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pepijndevos_ | ZirconiumX, going over Farnell to find parts (when will I ever learn to do this before ordering PCBs) it seems like HC is definitely the more most available family as far as I can tell. | 06:42 |
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pepijndevos_ | Also... DIP is on the way out, surprise, surprise | 06:43 |
pepijndevos_ | Except for the XOR gate, which they *only* had in AC in DIP. Lots of SOIC adn TSSOP | 06:45 |
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pepijndevos_ | The adder is also... available until they run out of stock. Should have done this stuff a few decades ago... | 07:11 |
tnt | pepijndevos_: any reason you didn't go for soic ? | 07:15 |
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ZirconiumX | pepijndevos_: for stuff running fast you should generally pick SOIC. It's smaller, so your chips can be denser and have shorter connections between them | 09:47 |
corecode | hm, -l doesn't write a log file | 09:57 |
corecode | did i catch a bad version in between? | 09:57 |
corecode | heh i just ran into a bug - i had an empty module, and yosys included it in the json as blackbox module, instead of as empty | 10:00 |
corecode | so nextpnr was like "top - i don't know what type of module that is" | 10:00 |
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ZipCPU | Did you give -l the name of the file to write? | 11:20 |
corecode | yes | 11:24 |
corecode | but i also passed -E | 11:24 |
corecode | hm, -E leaks error messages into the deps file | 12:09 |
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ZirconiumX | equiv_opt is confusing me a bit | 13:55 |
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pepijndevos_ | tnt, This thing is going to run a khz speeds so in this case I prefer to use sockets and have easy options for beun fixes. If stuff works, my CPU will deffinitely have SOIC. | 15:56 |
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corecode | pepijndevos_: what are you working on? synthesis of cpu into 74 series logic? | 16:11 |
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pepijndevos_ | corecode, exactly | 16:55 |
pepijndevos_ | corecode, https://github.com/ZirconiumX/74xx-liberty | 16:57 |
tpb | Title: GitHub - ZirconiumX/74xx-liberty (at github.com) | 16:57 |
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