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tnt | Does yosys support vectors of > 256 bits ? | 19:29 |
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Laksen | I would be worried something was very wrong if it doesn't :) | 19:35 |
tnt | verilog specs says support for larger vectors isn't mandatory ... | 19:36 |
daveshah | Pretty sure I've seen them working before | 19:40 |
ZipCPU | I just ran some 1024pt vectors through SymbiYosys the other day, so that sounds like they'd work | 19:55 |
tnt | ok nice. I know I had issue with iverilog IIRC. | 19:56 |
tnt | but maybe I had screwed up something ... | 19:56 |
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FL4SHK | tnt: I've used 256-bit vectors in iverilog | 23:34 |
FL4SHK | I didn't know it couldn't handle longer ones. | 23:34 |
FL4SHK | (the project I did for my master's degree was a CPU with 256-bit long registers) | 23:35 |
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