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| janrinze | ZipCPU: ah, right. we do have a life outside the matrix don't we ;-) | 09:21 |
|---|---|---|
| daveshah | You can't escape the matrix | 09:22 |
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| janrinze | :D | 09:37 |
| janrinze | daveshah: I just noticed some commits in ABC that may be of interest to Yosys. Specificaly something got reverted. Not sure how much the impact is but i wonder what Clifford's policy is on keeping up to date with ABC. | 09:38 |
| daveshah | janrinze: good spot | 09:39 |
| daveshah | In general things are kept relatively up to date | 09:39 |
| daveshah | In this case it seems to be related to the word-level stuff in ABC, which Yosys doesn't use afail | 09:39 |
| daveshah | *afaik | 09:39 |
| janrinze | Okay, currently Yosys is at ABC 2ddc57d. I'm building with latest commit now and will run a few tests. Probably no difference like you said. | 09:42 |
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| janrinze | forgot to add -j8 .. ah well, it will finish sometime soon. | 09:50 |
| janrinze | Nice, the json produced is identical. So no impact at all. | 10:03 |
| janrinze | daveshah: did we get any examples for SB_I2C and SB_SPI? I would like to try them as a substitute but try to avoid long debug sessions :D | 10:08 |
| janrinze | daveshah: also, I probably did not google enough but is there a symbol defined to identify the FPGA we are building for? Using `ifdef to make some blocks conditional to the type of FPGA would allow me to consolidate my sources. | 10:14 |
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| tnt | janrinze: I don't have any 'minimal example', but I have code on github using sb_spi ... | 10:28 |
| janrinze | tnt: i'd like to take a peek at that | 10:29 |
| tnt | https://github.com/smunaut/ice40-playground/blob/master/projects/riscv_usb/rtl/top.v#L266 | 10:29 |
| tpb | Title: ice40-playground/top.v at master · smunaut/ice40-playground · GitHub (at github.com) | 10:29 |
| tnt | https://github.com/smunaut/ice40-playground/blob/master/projects/riscv_usb/fw/boot.S | 10:30 |
| tpb | Title: ice40-playground/boot.S at master · smunaut/ice40-playground · GitHub (at github.com) | 10:30 |
| tnt | Basically it's a riscv (picorv32) with a small RAM4K boot zone that's initialized and loads the main app from flash into the larger SPRAM memory (because you can't initialize SPRAM). | 10:31 |
| janrinze | tnt: I see you did the bidirectional pin construct same as i have. There was some talk about getting that automatically supported. | 10:31 |
| tnt | I never trust auto-magic IO for anything else than pure input/pure output with no register. anything else I do myself. | 10:34 |
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| janrinze | tnt: have you had any luck at adding a SB_PLL to the output of SB_HFOSC? SB_PLL_CORE throws ERROR: PLL 'pllout.uut' couldn't be placed anywhere, no suitable BEL found. and SB_PLL_PAD obviously does not apply since it's not a pad. | 11:47 |
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| tnt | janrinze: I have never tried tbh ... | 11:51 |
| tnt | janrinze: you can try to switch the HFOSC output to be FABRIC rather than global, that might help. | 11:51 |
| tnt | janrinze: do you have a ready made test case ? | 11:51 |
| janrinze | tnt: not yet | 12:05 |
| janrinze | tnt: I've got duties outside the matrix.. perhaps this evening. for now i'll use an external wire to hook up the 12 MHz. | 12:22 |
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| endre_ | Hi, I have tried out yosys and nextpnr-ecp5 for the 1st time. I haven't got any experience with ECP5. Is it normal that for a 32 bit adder the following delay is reported?: "Info: Max delay <async> -> <async>: 23.84 ns" | 17:26 |
| endre_ | Isn't it a little bit slow? | 17:26 |
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| daveshah | That includes delay to/from the IO pins too | 17:26 |
| daveshah | For something with 96 pins, they will be quite spread out | 17:27 |
| daveshah | Put the adder between two registers and see what the max frequency is, that will be more realistic | 17:27 |
| endre_ | daveshah: thanks for the tip | 17:27 |
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| janrinze | daveshah: is there a simple way to show usage the statistics? I see them when nextpnr runs but it would be nice to retrieve them from either an .asc or .bin | 20:40 |
| daveshah | You can use icebox_stat | 20:40 |
| daveshah | on the asc | 20:41 |
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| daveshah | You can also do 'yosys -p stat design.json' if you want post-synth statistics | 20:41 |
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| janrinze | Ah, icebox_stat has not much info on the up5k DSP etc. | 20:43 |
| tnt | interestingly icebox_state doesn't match nextpnr output :/ | 20:45 |
| daveshah | Route throughs probably | 20:45 |
| tnt | for RAM ? | 20:46 |
| daveshah | No, just in general | 20:47 |
| tnt | I meant, they differ on the number of RAM used. | 20:47 |
| janrinze | the yosys command works. Somehow only absolute values, no info on how much it is of the available resources. | 20:48 |
| tnt | well yeah, yosys has no idea which model you're targetting. | 20:48 |
| daveshah | Is the RAM difference up or down? | 20:48 |
| tnt | up, icebox_stat reports 24 used. In reality there is 18 RAM4K used (and 4 SPRAMs) | 20:49 |
| janrinze | icebox_stat is very slow here.. The SPRAMs are not in the list and indeed it reports 6 SBRAM instead of 4 for my design. | 20:51 |
| janrinze | tnt: both results are around 50% more for BRAM. | 20:52 |
| daveshah | Yeah, looks like the way icebox_stat counts BRAM is broken | 20:53 |
| daveshah | It attempts to normalise y using seg[1] - (seg[1] % 2) | 20:54 |
| janrinze | Also amount of CARRYs is a little less than what yosys reports. | 20:54 |
| daveshah | But actually BRAMs start at an odd y | 20:55 |
| daveshah | icebox_stat counts used cout wires, Yosys reports number of SB_CARRY primitives | 20:57 |
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