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| emeb_mac | lol - tried using the up5k PLL as a clock for generating video. | 03:58 |
|---|---|---|
| emeb_mac | So much jitter - monitor was shimmering like crazy. | 03:58 |
| emeb_mac | Switched to using xtal osc for video clock - rock steady. | 03:59 |
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| cr1901_modern | When did icetime start using such an obscene amount of memory during compilation? I can't even get it to compile in 2GB RAM + 2GB swap anymore | 10:04 |
| tnt | icetime ? | 10:05 |
| cr1901_modern | yes, icetime | 10:05 |
| cr1901_modern | it's taking up 3GB of virtual memory just to compile on my Pinebook | 10:06 |
| cr1901_modern | and chances are it just crashed the system, so now I have to do it ALL OVER AGAIN | 10:06 |
| cr1901_modern | goddamnit | 10:06 |
| tnt | Ah yeah indeed all the timings are in a auto generated c file that gets compiled ... | 10:08 |
| cr1901_modern | prob been compiling close to 40 mins now | 10:09 |
| cr1901_modern | And I _know_ ppl used to native compile yosys and icestorm on their Pi 3s | 10:11 |
| cr1901_modern | and that had half the memory | 10:11 |
| cr1901_modern | hell I compiled icestorm on a 10 year old netbook w/ 1GB RAM | 10:11 |
| tnt | Originally it only supported a few chips. Each new chip support has been growing the timing database. | 10:14 |
| cr1901_modern | greeeeat | 10:14 |
| cr1901_modern | The bitter irony of it all is that it would still take me longer to setup a cross compile environment thatn it would to just wait this out | 10:15 |
| cr1901_modern | b/c gcc is such an absolute clusterf*** | 10:15 |
| tnt | cr1901_modern: https://pastebin.com/9ArvFfg5 | 10:25 |
| tpb | Title: diff --git a/icetime/Makefile b/icetime/Makefile index b1cd18d..f268b99 100644 - - Pastebin.com (at pastebin.com) | 10:25 |
| tnt | this might ease the pain a bit. | 10:25 |
| tnt | instead of making one large file, it splits it into one per device | 10:25 |
| cr1901_modern | tnt: Thanks... and noted. I'll try that next. Perhaps it can be a compile-time option | 10:26 |
| * cr1901_modern is probably killing a USB flash drive doing this | 10:27 | |
| tnt | The UP5k is probaly the biggest culprit here because of all the DSP configuration variants and the high number of in/out ports ... (and timings are from every in to every out so N*N) | 10:28 |
| cr1901_modern | tnt: I'll try that patch later today, thanks | 10:30 |
| cr1901_modern | I'm curious to see whether compilation completes or dies | 10:31 |
| tnt | hehehe :) | 10:31 |
| cr1901_modern | This of course doesn't solve the problem of bbasm taking a long time, but afaik those can be compiled ahead of time and are arch-agnostic? | 10:33 |
| tnt | yeah, the bba are arch agnostic. | 10:34 |
| tnt | But I thin there is a way to not have them built-in into the binary but have them separate as binary files. | 10:34 |
| tnt | Those binary files are _not_ fully arch agnostic, but if the endianness is the same, it should be good enough. | 10:35 |
| cr1901_modern | while I would love to see nextpnr run on a big endian arch, it's not my main concern right now | 10:36 |
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| mwk | external bba is broken on ice40 on master right now though :( | 17:27 |
| tnt | really ? | 17:27 |
| mwk | and tbh I have no idea what is the "proper" procedure to obtain the external chipdbs | 17:27 |
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| * mwk just snatched the .bba files from a non-external-chipdb nextpnr compile tree and manually bbasm'ed them | 17:28 | |
| mwk | tnt: https://github.com/YosysHQ/nextpnr/pull/251 | 17:28 |
| tpb | Title: ice40: Fix u4k in external chipdb mode. by koriakin · Pull Request #251 · YosysHQ/nextpnr · GitHub (at github.com) | 17:28 |
| mwk | it says 'u4k', but since nextpnr always mmaps all chipdbs, this completely breaks ice40 | 17:28 |
| tnt | oh :/ | 17:29 |
| tnt | well afaict it would break it for up5k | 17:29 |
| tnt | (overwriting the entry) | 17:29 |
| mwk | no | 17:30 |
| mwk | it will throw an exception on start, because it tries to open an already-open file object | 17:31 |
| tnt | Oh ... right. | 17:33 |
| mwk | hm, anyway | 17:34 |
| mwk | daveshah: can we get that merged? what's the official procedure for that? | 17:34 |
| mwk | that and #248 while we're at it | 17:34 |
| daveshah | can you ask clifford to check #248? don't know the bba codebase myself | 17:35 |
| mwk | ok | 17:35 |
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| emeb | tnt: got composite video working w/ basic on that up5k 6502 system -> https://www.dropbox.com/s/9vkouk57mjo9ym8/0320191242.jpg?dl=0 | 18:55 |
| tpb | Title: Dropbox - 0320191242.jpg (at www.dropbox.com) | 18:55 |
| tnt | emeb: ahaha, nice ! Composite ? | 19:02 |
| tnt | with just a gpio ? | 19:02 |
| emeb | tnt: yes - NTSC composite done with two io bits. | 20:29 |
| emeb | one for sync, one for luma | 20:29 |
| tnt | interesting. I never really looked at what a composite signal looks like. | 20:29 |
| tnt | Also you mentionned the PLL jitter. Was the PLL locked ? | 20:30 |
| tnt | is that on the upduino by anychance ? | 20:30 |
| emeb | The PLL was locked and running at the right frequency but pretty wiggly | 20:30 |
| emeb | this is on my own up5k board with "proper" supply circuits. | 20:31 |
| emeb | (the little purple board w/ 3 PMOD connectors in the foreground of that picture) | 20:31 |
| tnt | Mmm that's weird. I mean I used the PLL to generate HDMI clock without any trouble :/ | 20:32 |
| emeb | I'm going to do a bit more study of the PLL to see if I can clean it up some. | 20:33 |
| emeb | there's that filter parameter that always seems to be set to 3'b001 | 20:33 |
| tnt | What was the in/out frequency ? | 20:34 |
| emeb | Well, looking at my setup it could also be the PLL tracking the jitter on the reference. | 20:36 |
| emeb | I was using the on-chip 48MHz HOSC for the reference. Maybe try it with the external 16MHz xtal instead. | 20:36 |
| emeb | (this is what happens when you forget what you coded last week :P ) | 20:37 |
| emeb | tnt: that was the problem - noisy reference. | 20:42 |
| emeb | using external 16MHz into PLL then getting 16MHz out seems to have cleaned up the video stability to be equal to what I saw with xtal only. | 20:42 |
| emeb | \o/ - PLL is not a piece of junk. | 20:43 |
| tnt | :) | 20:44 |
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| tnt | emeb: is that micro usb for power only or do you have the data lines connected to the up5k ? | 20:54 |
| emeb | tnt: I have the data lines connected via resistors and a pullup line on DP as well. | 21:13 |
| emeb | tnt: I tried to put tinyfpga's bootloader in it but it doesn't enumerate. | 21:14 |
| tnt | emeb: you can try https://github.com/smunaut/ice40-playground/tree/experimental/projects/riscv_usb :) | 21:14 |
| tpb | Title: ice40-playground/projects/riscv_usb at experimental · smunaut/ice40-playground · GitHub (at github.com) | 21:14 |
| tnt | (shameless plug :p) | 21:14 |
| emeb | tnt: I'll give it a try! | 21:15 |
| emeb | tnt: I assume you've gotten it working for yourself? | 21:15 |
| tnt | Yeah. But it's a sample of 1 board, so curious to see if it works for others, on other board and other hosts. | 21:16 |
| emeb | cool - I'm very curious to see if I can make this work. | 21:16 |
| tnt | It's not a bootloader atm .... it just enumerates a couple of useless endpoints, but the hw is there, just need a DFU firmware :p | 21:16 |
| emeb | tnt: sure, that makes sense. I just want Linux to give me happy reports in the dmesg... | 21:17 |
| tnt | (you'll need to build and flash the riscv fw in the fw/ directory in addition ot the hw) | 21:17 |
| emeb | Aha - a bit of extra work. I assume the firmware goes into the SPI flash? | 21:18 |
| tnt | yes, at the 1M offset. The makefile has a 'make fwprog' target, but of course that uses iceprog ... | 21:20 |
| emeb | that's fine - I have to use iceprog to load the flash. | 21:23 |
| emeb | my little usb/spi board only knows the simple protocol for loading the sram in the up5k | 21:23 |
| emeb | tnt: getting an error during make in yosys: ERROR: Module `SB_RAM40_4K' referenced in module `usb_trans' in cell `mc_rom_I' does not have a parameter named 'INIT_FILE'. | 21:26 |
| emeb | is my yosys out of date? | 21:26 |
| tnt | yeah :/ | 21:26 |
| tnt | That got merged last week. | 21:26 |
| emeb | OK - is it safe to pull & rebuild? I saw some stuff earlier today about bugs in the git repo... | 21:27 |
| tnt | yeah, should be safe. | 21:27 |
| tnt | it's only nextpnr that has an issue and it's only if you try to use external chipdb which isn't the default option | 21:28 |
| emeb | kk | 21:28 |
| tnt | but you don't need to rebuild next-pnr, just yosys. | 21:28 |
| emeb | right | 21:28 |
| emeb | livin' large on the bleeding edge... | 21:29 |
| tnt | :) | 21:31 |
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| emeb | yosys is happier now. | 21:42 |
| emeb | just need to tweak the .pcf and top level for my board. | 21:42 |
| emeb | heh - timing just barely fails | 21:43 |
| tnt | emeb: you might need to tweak the PLL settings if your ref is 16 MHz btw. | 21:47 |
| tnt | emeb: try another seed for timing. Here is succeeds like 90% of the time but sometimes it's unlucky ... | 21:48 |
| emeb | tnt: yeah - was just looking at the sysmgr.v | 22:00 |
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| emeb | maybe my older nextpnr isn't able to make timing - tried lots of seeds and the 24MHz clock always fails by a small amount. backing off the requirement to 24MHz to see if it'll finish. | 22:21 |
| tnt | emeb: how small ? | 22:28 |
| emeb | tnt: missing by < 1MHz | 22:30 |
| tnt | Meh, should be fine. | 22:31 |
| emeb | but then I backed off constraint from 25 to 24 and it still missed - seems like the constraint affects the effort the algo exerts. | 22:31 |
| emeb | and since that failure results in an error condition on exit from nextpnr, make halts. | 22:32 |
| tnt | just retype make, it'll go through. | 22:32 |
| emeb | yep | 22:32 |
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| tnt | emeb: any success ? | 22:52 |
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| cr1901 | tnt: Thought I'd give an update on your patch... indeed, up5k is the culprit here. With your patch, I still requires 2GB of swap. However, the laptop is marginally usable now instead of completely and utterly unusable. Thanks to your patc | 23:45 |
| cr1901 | h* | 23:46 |
| cr1901 | In fact, it's compiling right now as I type :) | 23:46 |
| cr1901 | 1878 MB RAM/1529 MB swap | 23:46 |
| cr1901 | and I still have a responsive system (for now!) | 23:47 |
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