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Cerpin | Won't waste too much of anyone's time on this since it's probably a simple error, but: PLL usage procedure shouldn't change between lp8k and hx8k, or between arachne/next, correct? | 18:58 |
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Cerpin | (I have something that's been working fine for my HX8K, now moving to an lp8k-based board the PLL seems neither to lock nor output anything) | 19:01 |
daveshah | Just to double check, are you on the latest nextpnr? Some PLL fixes were merged in a few weeks ago | 19:03 |
daveshah | Also, which package/boards are involved? | 19:03 |
daveshah | I don't think there is a PLL difference for the LP8K/HX8K, but the maximum frequency achievable for a design will be lower on the lp8k | 19:03 |
daveshah | Cerpin: ^ | 19:04 |
Cerpin | Current up to about 20 hours ago. Seems to show 99.5 MHz as my max possible and I'm running with 60. I'm using a TinyFPGA now; Lattice's HX8K breakout before | 19:09 |
Cerpin | Err, BX though I guess that's probably a given | 19:09 |
daveshah | Should be fine | 19:10 |
Cerpin | I probed the clock pad on the tiny and the MEMS oscillator seemed to be at 16MHz at should | 19:10 |
Cerpin | Alright | 19:10 |
daveshah | Would you be OK putting your code somewhere? | 19:10 |
Cerpin | Sure, one moment | 19:13 |
Cerpin | Ok, the PLL instantiation is here https://bpaste.net/show/fc9155ec9a9a , and the formerly working code it's used in is here https://bpaste.net/show/bbdaad478e0d (the usbpu thing was added during testing, I didn't have that when I used it on the HX8K board) | 19:17 |
tpb | Title: show at bpaste (at bpaste.net) | 19:17 |
daveshah | Did you change the PLL config for 16MHz input? | 19:18 |
Cerpin | ...ah | 19:18 |
Cerpin | No, I did not. That's probably it :\ | 19:19 |
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Cerpin | Looks like things are functional again -- this found something subtly wrong in my design that arachne didn't, thanks for your work on next! | 21:06 |
daveshah | Cerpin: good to know it's working! | 21:07 |
daveshah | :) | 21:07 |
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