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| ZipCPU | Hello all! I just submitted a question on reddit.com/r/FPGA regarding why synthesis might not match simulation. Feel free to respond with your own experiences. | 19:40 |
|---|---|---|
| ZipCPU | I'm hoping to collect the responses and put a post together on the topic ... but we'll see what responses I get. | 19:40 |
| keesj | I think there is a reality gap | 19:55 |
| keesj | and eletrons who do not obey our laws | 19:56 |
| ZipCPU | I thought that was gremlins ? :D | 19:56 |
| keesj | call the Ghostbusters | 19:57 |
| keesj | in my little (and first realish) project.... 40% of the failure had... unkown causes | 20:01 |
| keesj | and a few remain to be discovered | 20:01 |
| ZipCPU | keesj: That's not allowed. All causes must be determined. | 20:02 |
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