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| philtor | ZipCPU: The thread seemed to die with the debbie downer there at the end. | 17:00 |
|---|---|---|
| ZipCPU | Yeah, I saw that. Did you see the link to the Digilent thread? | 17:01 |
| philtor | no | 17:01 |
| ZipCPU | Check the post mentioning Olof's quote. | 17:01 |
| philtor | "Companies cannot usually afford the man hours to use something like this." I spent a huge number of man hours trying to work around vivado bugs. | 17:02 |
| ZipCPU | I think it was a small second quote I made. There's a link in it to a fascinating Digilent thread, discussing why open source tool chains are *really* valuable. | 17:02 |
| philtor | Bugs that Xilinx wasn't even interested in hearing about from us | 17:02 |
| ZipCPU | Got to run, back in a bit | 17:02 |
| philtor | oh, I see it here: https://forum.digilentinc.com/topic/4472-rants-about-fpga-tool-chains/ | 17:06 |
| tpb | Title: Rants about FPGA tool chain(s) - Technical Based Off-Topic Discussions - Digilent Forum (at forum.digilentinc.com) | 17:06 |
| awygle | I think the topic of support is chronically under appreciated by FOSS engineers | 17:12 |
| awygle | Also someone should tell zygot that you can download Quartus Prime for free and design for the Cyclone 10s without a (paid) license | 17:17 |
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| ZipCPU | :D | 17:19 |
| awygle | i feel i may have come into the conversation halfway through, however | 17:22 |
| ZipCPU | awygle: The conversation began with a post on Altera's forums, asking about free software. | 17:23 |
| ZipCPU | philtor linked to a tweet about it here (IIRC): https://twitter.com/zipcpu/status/977516920877535232 | 17:23 |
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| awygle | ZipCPU: thanks for the link. Tricky sums up (at least a part of) my feelings well | 17:25 |
| ZipCPU | Yeah. Understood. There didn't seem to be much more to say after he posted, so ... the conversation died there. | 17:26 |
| awygle | my understanding is that UVM is open source | 17:26 |
| awygle | but that the current state of the rest of the open source ecosystem doesn't support its use | 17:27 |
| awygle | does that match your understanding? | 17:27 |
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| ZipCPU | Not sure I could say much about UVM, never tried it, never used it, still struggling to figure out how it comes to play in this whole ecosystem. | 17:28 |
| * awygle is all fired up but has to do his actual job | 17:34 | |
| ZipCPU | awygle: Feel free to support me on Patreon, then you won't feel as guilty! :P | 17:34 |
| awygle | ZipCPU: has your patreon made a meaningful impact on the amount of open source work you're able to do? | 17:35 |
| ZipCPU | Not sure how I'd answer that. | 17:36 |
| ZipCPU | I mean ... even with all the numbers, finances, figures, etc., ... I'm not sure how I would go about answering it. | 17:36 |
| ZipCPU | I will say this, almost *all* of my work in the past couple years is on github. | 17:36 |
| awygle | all right, let me rephrase: i want to do more open source work, should i start a patreon? :p | 17:38 |
| ZipCPU | Ahh, okay, that's an easier question to address. | 17:39 |
| awygle | i suspect your advice will be "start a blog" | 17:39 |
| ZipCPU | I've had the patreon account now for 3/4 of a year now, and ... it doesn't pay the needs of my family. Specifically, it's not coming close to paying for my son's college tuition. | 17:40 |
| ZipCPU | Patreon is one of those things where you have to build a following, and ... it can be slow doing that. | 17:40 |
| ZipCPU | There are folks who are making $40k+/year on Patreon. That would cover a lot (not all) of my expenses, but I'm a long way from getting there. | 17:41 |
| awygle | this is more or less my impression as well. donations as a business model are very challenging | 17:42 |
| ZipCPU | Although, I might have a suggestion for you if you are interested in that road ... | 17:42 |
| ZipCPU | "Inbound Marketing: Get found using Google, Social media, and blogs", by Brian Halligan and Dharmesh Shah --- a wonderful book about today's marketing challenges and solutions. | 17:43 |
| awygle | thanks for the suggestion! i'll add it to my list | 17:43 |
| awygle | i've fallen very behind on books recently but i hope to have time to improve the situation soon | 17:44 |
| ZipCPU | I found it at a used bookstore. I'm not intending on selling my copy, not sure why whoever sold it to the used book store did--the things' been gold to me. | 17:44 |
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| xerpi | hi, it seems like modules are searched on <modname>.v but I'm using systemverilog so my extensions are .sv | 17:49 |
| xerpi | https://github.com/YosysHQ/yosys/blob/a96c775a7301645b27486a5e663c75fca460f577/passes/hierarchy/hierarchy.cc#L176 | 17:49 |
| tpb | Title: yosys/hierarchy.cc at a96c775a7301645b27486a5e663c75fca460f577 · YosysHQ/yosys · GitHub (at github.com) | 17:50 |
| xerpi | would it be a good idea to be able to tell yosys about our file extensions? | 17:50 |
| awygle | sounds like a useful thing to do | 17:51 |
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| awygle | as long as you're submitting a PR, the obvious generality of that loop with two explicit cases hurts my heart :p | 17:52 |
| xerpi | awygle, yeah having a list of "let's try this extension" would be cleaner | 17:54 |
| awygle | xerpi: i was thinking a list of (frontend, extension) pairs myself but yeah, basically | 17:55 |
| xerpi | awygle, {"verilog", {".v", ".sv"}}, {"ilang", ".il"} ? | 17:55 |
| xerpi | yeah I guess that would be much cleaner | 17:56 |
| awygle | xerpi: ("verilog", ".v"), and then --verilog-ext=".sv" is what i was picturing. a multi-level map is more general though | 17:57 |
| xerpi | and what about the other frontends? | 17:57 |
| xerpi | it would be hard to know that given --foo-ext, figure out foo is a frontend | 17:57 |
| xerpi | tricky to parse | 17:58 |
| awygle | sure, just what was my first thought | 17:58 |
| xerpi | hmm that's weird | 17:58 |
| awygle | since frontends require code changes (writing the frontend) i was okay with that list being hardcoded | 17:58 |
| xerpi | I'm using yosys to generate a json | 17:58 |
| xerpi | yosys -q -o top.json -p proc -p opt -p "hierarchy -auto-top" $(TOP) | 17:58 |
| xerpi | top.sv instantiates from a module called fulladder.sv | 17:59 |
| xerpi | I've copied fulladder.sv to fulladder.v but it doesn't find it (no fulladder block in the diagram) | 17:59 |
| xerpi | if I run: yosys -q -o top.json -p proc -p opt -p "hierarchy -auto-top" $(TOP) fulladder.sv | 17:59 |
| xerpi | it works | 17:59 |
| xerpi | so I have to add all my .sv's to the cmd line | 18:00 |
| xerpi | awygle, I'd write that pull request if that prevent me from having to add the list of all my .sv's xDD | 18:00 |
| xerpi | I don't have to pass my list of .sv's (only top module) to verilator and I'd like to be able to do the same with yosys :P | 18:01 |
| xerpi | I guess I'll use *.sv for now heh | 18:08 |
| ZipCPU | Be aware ... with *.sv (or *.v for that matter) you may need to identify to hierarchy which module is the "top" module | 18:09 |
| xerpi | ZipCPU, yeah for now my project is very small, but I can set the top module using the hierarchy command | 18:12 |
| ZipCPU | k | 18:12 |
| awygle | i've been explicitly read_verilog-ing all of my files every time >_> | 18:12 |
| xerpi | I still was expecting copying my .sv to .v to work hm | 18:12 |
| * ZipCPU has done the same as awygle, even teaching AutoFPGA how to compose that list of files | 18:13 | |
| awygle | i think the autodetect only works if the module name is the same as the .v file name, so you might have to read_verilog the file containing top? | 18:13 |
| xerpi | awygle, exactly, that's what I was expecting | 18:13 |
| xerpi | and also what I'm doing | 18:13 |
| awygle | it doesn't look like it on your command line though. you're just using hierarchy -auto-top, not actually grabbing the file containing $(TOP) | 18:14 |
| awygle | (unless you pass it explicitly) | 18:14 |
| xerpi | oh ok let me try that | 18:14 |
| awygle | basically i'd expect it to find the fulladder module automatically, but not any others | 18:15 |
| xerpi | so not specifying any hierarchy should also work | 18:16 |
| xerpi | yosys -q -o $tmp_json -p proc -p opt mytopmodule.sv | 18:16 |
| xerpi | doesn't automatically detect fulladder.v :( | 18:16 |
| xerpi | (also tried "hierarchy -top mytopmodule") | 18:17 |
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| * ZipCPU is checking whether or not the current yosys in the repo supports xerpi 's request | 19:27 | |
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| ZipCPU | xerpi: Try a pull of yosys from github.com/YosysHQ ... see if that helps you out at all. | 19:29 |
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| xerpi | ZipCPU, sure, I'll try the upstream version | 19:42 |
| xerpi | my OS version is Yosys 0.7 (git sha1 cc49ece) | 19:43 |
| ZipCPU | The upstream version may have just changed .... | 19:43 |
| xerpi | nope still not working :/ | 19:46 |
| xerpi | I'll add some debug printfs to see what's going on hehe | 19:46 |
| ZipCPU | No? | 19:46 |
| xerpi | no, it doesn't automatically load fulladder.v | 19:47 |
| ZipCPU | Try this, put together a minimal example of what's failing that can then be used as both a means of communicating what you are looking for, as well as a test case. | 19:52 |
| xerpi | that would be a good idea yeah | 19:56 |
| xerpi | btw, expand_module is only called when doing an hierarchy pass | 19:57 |
| xerpi | and frontend_call is called only if libdirs is not empty | 19:57 |
| xerpi | I guess it would be nice to always add the dir of the module that's being checked to libdirs | 20:00 |
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| xerpi | I've added some cout's and it's definitely looking for fulladder when running "hierarchy" | 20:11 |
| xerpi | the problem is that the libdirs list is empty | 20:12 |
| xerpi | I'll try pushing back the path of the module | 20:12 |
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| xerpi | yeah adding -libdir manually makes it try to load the fulladder.v | 20:18 |
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| xerpi | yay, fixed it! | 20:31 |
| xerpi | ZipCPU, awygle what do you think? https://hastebin.com/ipeladelew.diff | 20:33 |
| awygle | Looks reasonable to me, so long as "verilog - sv" is the correct front-end | 20:35 |
| ZipCPU | Other than the extensions_map and the reconstruction brought about with it ... how does that fix your issue in a way that the previous fix didn't? | 20:36 |
| awygle | I'm not a Yosys dev though so ultimately my thoughts are of limited use lol | 20:36 |
| xerpi | ZipCPU, now it will also looks for .sv files | 20:36 |
| ZipCPU | Just like the build from github should've done for you. | 20:37 |
| xerpi | still have to pass "-libdir ." to hierarchy but that's not a problem | 20:37 |
| ZipCPU | That's why I had you do a pull ... to get the change that should've fixed your issue. | 20:37 |
| xerpi | ZipCPU, not really, without my patch it only tries to open .v and .il files | 20:37 |
| xerpi | uh what | 20:37 |
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| ZipCPU | Then you didn't get the right files. :) | 20:37 |
| xerpi | urgh yeah, sorry :( | 20:37 |
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| xerpi | I thought my pull you meant "fix it and do a pull request" | 20:37 |
| xerpi | by pull* | 20:38 |
| ZipCPU | Nope. | 20:38 |
| xerpi | right, sorry then | 20:38 |
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| xerpi | anyways my "fix" can now be considered a cleanup lol | 20:38 |
| xerpi | less code duplication | 20:38 |
| ZipCPU | I mean ... I like your patch and all, and see how it could be valuable ... especially if yosys tries to add other files (.vhd for example) ... | 20:38 |
| xerpi | exactly :) | 20:39 |
| xerpi | here's a rebased version of it: https://hastebin.com/raw/omexabipiv | 20:41 |
| xerpi | I have a compilation error on ABC btw: https://hastebin.com/raw/unadehigoq | 20:43 |
| xerpi | bitbucket.org/alanmi/abc has now moved to github :) | 20:43 |
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| ZipCPU | Ok, let me look into that one ... | 21:10 |
| ZipCPU | Sure looks like it ... | 21:11 |
| ZipCPU | xerpi: Just submitted a yosys issue regarding the location of ABC. | 21:41 |
| xerpi | ZipCPU, nice! | 21:42 |
| ZipCPU | clifford is usually fairly responsive to simple issues, so ... I expect it'll be "fixed" soon enough. | 21:42 |
| xerpi | good to hear | 22:08 |
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