Wednesday, 2019-05-01

*** tpb has joined #vtr-dev00:00
litghostkem_: I'm working on implementing a timing model, and believe I want to add a switch type https://github.com/verilog-to-routing/vtr-verilog-to-routing/issues/55018:17
tpbTitle: Fanout delay modelling · Issue #550 · verilog-to-routing/vtr-verilog-to-routing · GitHub (at github.com)18:17

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