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daveshah | mithro: yay! | 07:31 |
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daveshah | Next step is probably checker | 07:36 |
mithro | daveshah: Yeah - need to finish RAM routing support for that | 16:03 |
mithro | daveshah: Which should be relatively simple | 16:03 |
mithro | daveshah: I would also like to get some proper timing data into the model | 16:04 |
daveshah | mithro: Sure, we can discuss that later | 16:04 |
mithro | daveshah: Would you be able to verify that pnr for blink passes on your computer? | 16:05 |
daveshah | mitho: yeah, I'll take a look in an hour or two | 16:05 |
mithro | daveshah: Okay great | 16:09 |
mithro | daveshah: I would also like to understand the issue jhol was having that I documented here -> https://github.com/SymbiFlow/symbiflow-arch-defs/issues/144 | 16:14 |
tpb | Title: Create an ice40 test for the packing of different types of flip flops together · Issue #144 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 16:14 |
mithro | kem_: So, we have a "blinky" demo for the ice40 which should work on real hardware! | 16:26 |
kem_ | mithro: Nice! | 16:27 |
mithro | kem_: At some point I would like to discuss how to merge this stuff... | 16:27 |
kem_ | mithro: Probably best to present an overview of what the changes involve at this week's VTR meeting. | 16:29 |
mithro | kem_: The two big parts are adding metadata support to most objects and the actual HLC writer | 16:29 |
mithro | kem_: the HLC writer is the only part which is really ice40 specific | 16:30 |
kem_ | mithro: I'd suggest putting together a (short) presentation which walks through the changes, and importantly their motivations. | 16:31 |
mithro | kem_: Okay - it'll probably only end up being 3 slides :-) | 16:31 |
kem_ | mithro: Sounds good, it just gives us something concrete to discuss and reference | 16:32 |
kem_ | mithro: Its not really clear to me yet (and I suspect others) where the dividing line should be between VTR and the device-specific code; so I expect that to be the main topic of discussion | 16:34 |
mithro | kem_: Yeah - I've tried to keep the device-specific code as minimal as possible | 16:34 |
mithro | daveshah: It would be good if you or clifford could look at the icestorm pull requests too | 16:37 |
daveshah | mithro: yeah, I'm sure clifford will deal with them soon | 16:38 |
mithro | daveshah: "deal with them" sounds so ominous :-P | 16:38 |
daveshah | mithro: the FF issue is basically | 17:01 |
daveshah | some of the FF configuration is shared between all 8 FFs in a tile | 17:01 |
daveshah | clk, cen, s/r signals, and whether or not they are used, are shared | 17:01 |
daveshah | as is clock polarity | 17:01 |
daveshah | sync/async and set/reset can be set per flip-flop | 17:01 |
daveshah | wtf conda seems to be installing a whole Linux distribution :P will test once thats done (was subverting it with some symlinks but that seems to have broken) | 17:07 |
mithro | daveshah: Yes, I understand it as a high level and as far as I understand it, the packer should check validity and refused to pack unroutable things together | 17:09 |
daveshah | mithro: the problem is not routability, its modes too | 17:09 |
daveshah | if one flipflop uses a negative edge clock, all in that tile must use a negative clock (or have the DFF disabled) | 17:09 |
mithro | daveshah: Sure - that means the clk signal path will be used for nclk and there will be no path to get clk to the DFF -- hence routing will fail | 17:10 |
daveshah | what? | 17:10 |
daveshah | the routing in this case is identical | 17:10 |
daveshah | just the primitive is different | 17:10 |
daveshah | SB_DFFN vs SB_DFF | 17:11 |
mithro | daveshah: A SB_DFFN is a SB_DFF with a nclk rather than a clk, right? | 17:11 |
daveshah | yes | 17:11 |
mithro | daveshah: and there is one possible nCLK inverter for the whole tile, right? | 17:12 |
daveshah | yes, but there is no concept of an nCLK inverter in any other toolchain | 17:13 |
daveshah | the clock net is still named the same | 17:13 |
daveshah | proof is failing. which icestorm branch should I be on? | 17:13 |
daveshah | I'm on ddd7cd00c80f79998a27d441f4b9ad4ff0997669 | 17:14 |
daveshah | also, is it symbiflow 4mcmaster2? | 17:14 |
daveshah | ah, getting QED on 4mcmaster7 | 17:15 |
daveshah | *4mcmaster! | 17:15 |
mithro | 4mcmaster on everything | 17:15 |
mithro | daveshah: It's something like ClkNeg right? | 17:15 |
daveshah | NegClk, the config bit is called | 17:16 |
mithro | daveshah: Could you get me some verilog which has a bunch of SB_DFF and SB_DFFN's in them? | 17:26 |
mithro | daveshah: Does the N always go after the SB_DFF? or at the end? | 17:27 |
mithro | IE is it SB_DFFESSN or SB_DFFNESS ? | 17:27 |
daveshah | the latter | 17:27 |
daveshah | Pre synthesis verilog https://www.irccloud.com/pastebin/GnERfGBj/ff_modes.v | 17:28 |
tpb | Title: Snippet | IRCCloud (at www.irccloud.com) | 17:28 |
daveshah | Post synthesis verilog https://www.irccloud.com/pastebin/orc1lIcP/ff_modes_synth.b | 17:29 |
tpb | Title: Snippet | IRCCloud (at www.irccloud.com) | 17:29 |
daveshah | This is a small test case I've used | 17:29 |
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mithro | daveshah: Okay, have meetings now will have something for you in an hour or two | 17:31 |
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mithro | daveshah: Wouldn't happen to have a pcf file for that? | 18:06 |
daveshah | No, but you can create one easily enough | 18:06 |
mithro | daveshah: I ran out of pins from the iceblink.pcf :-P | 18:07 |
daveshah | Have a look at the list of pins in icebox then | 18:08 |
daveshah | https://github.com/cliffordwolf/icestorm/blob/master/icebox/icebox.py#L3241 | 18:09 |
tpb | Title: icestorm/icebox.py at master · cliffordwolf/icestorm · GitHub (at github.com) | 18:09 |
mithro | daveshah: Yeah most of the way through a tool to auto-convert pcf files | 19:24 |
daveshah | Nice | 19:27 |
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