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leons | I'm currently trying to synthesize a LiteX SoC for Fomu,, using the target and platform definitions of litex-hub/litex-boards | 12:59 |
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leons | Unfortunately, yosys complains that the module "IFS1P3BX" is not part of the design | 12:59 |
leons | I'd be happy to get a pointer on where to look for the definition of that module or what I could be doing wrong :) Essentially I haven't modified the definitions and I'm on a recent LiteX commit | 13:01 |
tnt | That's a ECP5 primitive. | 13:01 |
tnt | fomu is ice40 | 13:01 |
daveshah | I think there was some refactoring of this stuff in litex recently, perhaps ice40 and ecp5 accidentally got mixed | 13:02 |
leons | Ah, I see. Then it makes sense why it won't work :) | 13:03 |
leons | One should of course read the FIXME statements in the source code, there are some manual fixes required in the pulled valentyusb | 14:09 |
leons | Now I'm at `ERROR: Unable to place cell 'storage_2[5]_SB_DFFESR_Q_1_DFFLC', no Bels remaining of type 'ICESTORM_LC'` | 14:09 |
tnt | So your design is too large ... doesn't fit. | 14:10 |
leons | But I guess that is an issue on the LiteX side? Since naturally the gateware must have fit onto the FPGA in the past | 14:10 |
tnt | It's always been super full so any tiny change could have pushed it over the line. | 14:11 |
tnt | It's not impossible that a bug fix that maade the logic slightly bigger would break it. | 14:11 |
leons | I see. That would've been my question anyways :) | 14:11 |
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leons | I would've tried to integrate the VexRiscv "full" variant, but I guess I shouldn't have too high hopes for that to fit then? | 14:13 |
tnt | Not a chance | 14:14 |
leons | haha that's good to know :) | 14:14 |
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leons | Out of curiosity: Are there even any Lattice ICE40 FPGAs with a similar footprint but more LUTs? | 14:24 |
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tnt | There is the HX8k which has more LUTs. doesn't come in QFN, only BGA but about same physical size. | 14:31 |
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tnt | _however_ ... | 14:31 |
tnt | it doesn't have the large 1 MBit internal SRAM block :/ | 14:32 |
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leons | right, 128kbit RAM isn't a lot to work with | 14:35 |
leons | Given that the FOMU is already quite barebones in terms of supported peripherals, I suppose there isn't a lot I can throw out to make room? Maybe the Wishbone-USB bridge? | 14:37 |
leons | Unfortunately I'd like to keep the CPU :) | 14:37 |
tnt | I'm not sure what the fomu default config has tbh. But I can definitely make a USB enabled risc-v fit in ~ half the logic. | 14:40 |
leons | tnt: That sounds promising. I've only been working on an ArtyA7 until now, I don't know what to expect from the FOMU. I'll continue to experiment and see how to make it fit. | 14:47 |
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