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| pollo | Hey, I was wondering if there was some efforts going on to update chopstx for the tomu to the latest version | 01:21 |
|---|---|---|
| pollo | Gniibe has been releasing new versions lately :F | 01:22 |
| pollo | I've also been working on packaging the tomu bootloader in Debian! | 01:22 |
| pollo | If everything goes well I'd like to have an ncurses client to flash the bootloader when you install the package | 01:23 |
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| ewen | AmosSam: Re your questions yesterday about LED colours, can you tell me which colours you get on the hacker edition? Eg, blinking colour, and the colour that lights with each button? | 07:35 |
| ewen | AmosSam: I'd like to at least add some comments explaining that. And maybe figure out how to make the code adapt to the appropriate board pins / LED colours. | 07:35 |
| xobs | ewen: looks like RGB2: Red, RGB1: Green, RGB0: Blue | 07:36 |
| ewen | xobs: Thanks. Seems like RGB0 is the same, but RGB1/RGB2 are opposite | 07:40 |
| ewen | If I get a chance I'll see if I can figure out a way to make both combinations work in the Verilog (`ifdef should do it, if nothing else). | 07:41 |
| xobs | ewen: that'd probably be the best way to do it -- and adding a pcf file and a Makefile entry | 07:42 |
| ewen | xobs: Does the hacker edition have the same SG48 chip package? | 07:42 |
| xobs | No, it's a WLCSP like the DVT boards | 07:42 |
| ewen | xobs: Do you have any reference for which pins are used for what? (For making up the PCF file.) | 07:42 |
| xobs | https://github.com/im-tomu/fomu-hardware/blob/master/hacker/releases/v0.0-19-g154fecc/schematic.pdf would be most useful | 07:44 |
| tpb | Title: fomu-hardware/schematic.pdf at master · im-tomu/fomu-hardware · GitHub (at github.com) | 07:44 |
| ewen | xobs: Also, are you wedded to the led_r / led_b / led_g names? Because as best I can tell SD_RGB_DRV really wants RGB0(pin-that-is-rgb0), etc | 07:44 |
| xobs | Nope, renaming things is fine. | 07:44 |
| ewen | Cool, I'll try to figure out something that makes sense. | 07:45 |
| ewen | For those playing along at home, on WLCSP pins seem to be A5/B5/C5 for RGB 0/1/2 respectively | 07:45 |
| ewen | And based on your notes above, it looks like hacker edition PCB got laid out like the schematic. | 07:47 |
| AmosSam | ewen: if you need some more info/details, i'll be home at computer in 12-13 hours... | 07:55 |
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| xobs | Yay, managed to get a bit-banged SPI interface going! That took entirely too long. | 08:06 |
| ewen | xobs: woot! | 08:07 |
| xobs | Now I just need to fix the fact that I'm over my storage budget by ~20%. Foboot has ballooned to 10.5 kB | 08:07 |
| xobs | I mean, eventually I'll do XIP, and/or load the image from flash. But it's nice to validate that this works :) | 08:08 |
| ewen | AmosSam: I've hopefully got enough info now (xobs said "RGB2: Red, RGB1: Green, RGB0: Blue", which would mean red/green are swapped from the EVT boards). | 08:08 |
| ewen | xobs: FWIW, our experiences with the TinyFGPA BX bringup was that XIP was pretty slow for CPU code if you have to fetch from SPI. (My guess is SPI overhead on single byte fetches.) | 08:11 |
| ewen | So it'd certainly be nice if you were able to get it to be smaller again. | 08:11 |
| xobs | I mean, eventually I'll remove printf support, since that's only an EVT feature. | 08:31 |
| ewen | Yeah printf libaries are often a few kB just by themselves. | 08:32 |
| xobs | I switched to march=rv32i, so now I supply div.S and mul.S, but on the flip side I have 20% of the FPGA available. | 08:39 |
| ewen | xobs: IIRC you're just needing div for printf()? In which case it might be possible to hard code those as someone suggested a few days ago. (octal / hex are trival shifts normally) | 08:49 |
| ewen | (But OTOH, if you're going to turn off printf anyway, you | 08:50 |
| ewen | (you'll) get that space back anyway. | 08:50 |
| xobs | ewen: correct, and as you say it should get removed anyway. | 08:51 |
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| MadHacker | If XIP is slow because of SPI overheads, a small prefetch buffer would probably work wonders. Always read 8 bytes instead of 1 or similar and be ready to pass on the next byte from the buffer if the address matches. | 09:37 |
| xobs | VexRiscv has an icache that should speed things up somewhat. | 09:38 |
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| MadHacker | Aye, as long as the cache fill does a decent row length at a time it'll do the same thing. Lot more logic/area for that tho. | 10:00 |
| tnt | the spi controller in the picosoc acts as a memory map to do XIP and has a bunch of modes.including CRM mode of SPI flash that's done exactly for XIP. | 10:04 |
| tnt | ther eis a small graph at the bottom of https://github.com/cliffordwolf/picorv32/tree/master/picosoc | 10:04 |
| tpb | Title: picorv32/picosoc at master · cliffordwolf/picorv32 · GitHub (at github.com) | 10:04 |
| xobs | tnt I was looking at that. It looks really cool, and does a bunch of fancy things including DDR. | 10:05 |
| xobs | I backed out my changes and moved to bit-banged SPI for now, just to get DFU mode working. | 10:05 |
| tnt | xobs: yeah, it's always time to optimize later :) | 10:06 |
| tnt | Here I got the built-in spi controller working yesterday. | 10:06 |
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