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mithro | xobs: Did you see https://github.com/SpinalHDL/VexRiscv/issues/60 ? | 00:38 |
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tpb | Title: Linux on VexRiscv · Issue #60 · SpinalHDL/VexRiscv · GitHub (at github.com) | 00:38 |
futarisIRCcloud | mithro: Looks like kgugala has it running on Arty. | 01:02 |
xobs | mithro: I did, but I thought it was too heavy for ice40. | 01:04 |
xobs | I've been concentrating more on things like the smaller, non compliant MMU, and getting hardware dsp support. | 01:05 |
xobs | It's good to know it's progressing nicely! | 01:05 |
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futarisIRCcloud | mithro / xobs: I saw whitequark recently added a rgb_input module to glasgow. RGB555 parallel bus. https://github.com/GlasgowEmbedded/Glasgow/blob/master/software/glasgow/applet/video/rgb_input/__init__.py | 01:28 |
tpb | Title: Glasgow/__init__.py at master · GlasgowEmbedded/Glasgow · GitHub (at github.com) | 01:28 |
xobs | futarisIRCcloud: that's using their PMOD bus, isn't it? | 01:33 |
futarisIRCcloud | xobs: https://twitter.com/whitequark/status/985040607864176640 / #glasgow | 01:37 |
futarisIRCcloud | I think it has a 16 pin bus... | 01:37 |
futarisIRCcloud | 15 for pixel data, 1 for pixel clock. | 01:38 |
futarisIRCcloud | Sampling all 16 @ 22.5Msps, so you should be able to run 640x480x60Hz over that. 848x480x60Hz would be near the limits. | 01:42 |
futarisIRCcloud | Whoops I meant 848x480x50Hz. | 01:42 |
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xobs | That's bizarre. If I touch the blue lead of the RGB LED with a high-impedence scope probe, it turns on. What might cause that? | 06:43 |
tnt | With a good led, 3 uA would be visible in some condition. | 06:47 |
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xobs | No, I know why it's lighting up -- some of the soldermask got scraped away, and I'm mirroring the signal on TOUCH_2, so what I'm actually doing is connecting LED_B to TOUCH_2. Which is interesting, because that means that the LED pins are probably floating. | 07:08 |
tnt | ah, so bad solderjoint ? | 07:15 |
xobs | I don't think so. If that were the case, it would actually be three bad solder joints (the R, G, and B pins), since the 3.3V pin is working just fine. | 07:16 |
tnt | but you said you checked the RGB outputs of the fpga ? | 07:32 |
MadHacker | xobs: LED output probably only pulls one way, so if it's off, it's floated rather than pulled high/low. | 07:55 |
xobs | I thought I did, but I'd like to amend that statement by saying that I just checked, and it looks like it's not working. | 07:56 |
xobs | The only thing the RGB pins are doing is leaking HFOSC. I have them hooked up to SB_IO, and they ought to be outputting values, but they're not. | 07:57 |
xobs | It's leaking HFOSC at like 20 mV, so it's not much, but I'm totally not seeing any output. | 07:57 |
tnt | xobs: well no .. they're open drain, so they can be floating or connected to GND. | 08:00 |
tnt | you need to put an external pull up and then you can see how they behave. | 08:00 |
tnt | ah well I guess the led should act as a pull-up so you should be reading 3v3 | 08:02 |
xobs | tnt I thought I read that it could be used as a general-purpose I/O, but you're right even in that mode it's open-drain only. | 08:03 |
xobs | So I know the LED on this one board is good. | 08:07 |
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xobs | Oh that's interesting on Yosys: "ERROR: cell type 'SB_IO_OD' is unsupported" | 08:23 |
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xobs | Okay, I scraped away the soldermask so I could measure two of the three lines. Green is stuck at 1.5V, and blue is stuck at 1.2V. They should be going through a PWM. | 08:35 |
tnt | Do you have several boards btw or just one ? | 08:40 |
xobs | I have 100 boards, though I've destroyed a few. One poor board sacrificed itself for me to discover the crystal was installed upside-down. (It needs to go the opposite of what the datasheet says) | 08:42 |
xobs | And I just verified the exact same thing on a second board -- C5 is at 1.2V, and A5 is at 1.5V. They're not pulsing. | 08:46 |
xobs | And now I'm onto a third board. | 09:06 |
xobs | rohitksingh_work/rohitksingh (or anyone else with a working hacker board): could I have you test this bitstream to see if it works? I'm wondering if it's my test code, or if it's maybe something else. | 09:10 |
xobs | Wait... | 09:10 |
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xobs | Well, bugger. My schematic has pin A3 labeled as "GND", when in fact it's "VCCIO_0". Guess this batch is mostly getting scrapped. | 09:14 |
MadHacker | Oops. That'll break it. Could toast off the offending track before placing if you desperately needed to salvage the batch? | 09:16 |
MadHacker | (assuming more than one vccio_0) | 09:17 |
xobs | MadHacker: nope. via-in-pad | 09:17 |
MadHacker | That's easier, spot-face cutter. | 09:17 |
xobs | how's that? | 09:17 |
MadHacker | You know the tool you use for veroboard? | 09:17 |
MadHacker | Like a drill. | 09:17 |
MadHacker | Just scrape off the top of the via. | 09:18 |
xobs | I'm not sure how I'd do that. These ICE40s are really hard to unsolder and solder back on. | 09:18 |
MadHacker | No use unless you have another way to get VCCIO into it though. | 09:18 |
MadHacker | How close is it to anything else? Could just run a drill straight through the via from the far side and core it out, if it's a through via. | 09:19 |
MadHacker | Just don't go heavy-handed on the drill and go through the chip. :D | 09:19 |
MadHacker | (Spot the person who has to deal with very very very short deadlines and rework is the only option...) | 09:19 |
xobs | It's... possible... USB_N is on the other side, and layer 3 actually has 3.3V and VCCPLL (which are basically the same thing), it's just layer 2 that has GND. | 09:20 |
tnt | How does USB ever works ?!? | 09:20 |
xobs | tnt: I haven't gotten around to testing USB, but you're right that wouldn't work either. | 09:21 |
tnt | btw vccpll is 1v2 not 3v3 | 09:23 |
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xobs | Well, that is very sad. | 09:42 |
xobs | On the bright side, now I have 100 boards that I can use for testing NVCM programming. And case design. | 09:42 |
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tnt | xobs: yeah :/ | 09:52 |
tnt | Definitely interested in finding your NVCM results :) | 10:04 |
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futarisIRCcloud | xobs: I have 4 hacker boards. | 11:14 |
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