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mithro | nrossi: Potentially... | 00:16 |
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mithro | nrossi: I think the demo would need to show how to do multiple "firmwares" (Linux / MicroPython / Zephyr / bare metal?) for the same FPGA SoC configuration? | 00:17 |
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shenki | _florent__: hello | 04:49 |
_florent__ | shenki: | 05:11 |
_florent__ | shenki: hi | 05:11 |
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_florent__ | shenki: thanks for the feedback on the litepcie issue, i'll reproduce the behaviour and will give you more information | 05:12 |
shenki | _florent__: great! | 05:13 |
shenki | _florent__: some members from my team who do the pcie parts of the firmware are interested in helping | 05:13 |
shenki | _florent__: what power9 box do you have? | 05:13 |
_florent__ | shenki: it's this one: https://www.raptorcs.com/content/TLSDS3/intro.html | 05:15 |
tpb | Title: Raptor Computing Systems::TLSDS3 Intro (at www.raptorcs.com) | 05:15 |
shenki | nice | 05:16 |
_florent__ | i'll try to reproduce the behaviour before the end of the week | 05:18 |
_florent__ | there is no hurry for that, we just want to experiment with power9 cpu with a client | 05:18 |
shenki | okay. my team is repsonsible for pcie, so any bugs are interesting to us :) | 05:20 |
_florent__ | i haven't investigated a lot yet, so that's maybe something really stupid on my side :) | 05:25 |
_florent__ | we'll see, thanks for the help | 05:25 |
shenki | hah! It would be nice to print a better error message, if possible | 05:25 |
shenki | the EEH code is being reworked a lot | 05:25 |
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