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| CarlFK | mithro: you might know a thing or two about chorome - how do I set a header? | 00:38 |
|---|---|---|
| CarlFK | tumbleweed: you might know what header I need to yoink to do auth things at https://lca2019.linux.org.au/schedule/conference.json ;) | 00:40 |
| mithro | xobs: Morning | 00:43 |
| xobs | mithro: afternoon! welcome back. | 00:43 |
| mithro | xobs: The auto_crc stuff now seems to work with the parallel CRC | 00:43 |
| xobs | :D | 00:44 |
| mithro | xobs: I'm a bit worried that it might use up a lot of resources... | 00:44 |
| xobs | Oh. I could definitely see that. | 00:44 |
| xobs | For right now, it seems like what we really need is that state machine, which I need to look into hooking up. | 00:45 |
| xobs | Though we'll need CRC16 if we want to be accurate in our transmission of "ACK". | 00:45 |
| mithro | xobs: Well, sending a packet and receiving a token should both work | 00:45 |
| mithro | xobs: So I'm about to hook together the Transaction statemachine | 00:46 |
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| * xobs uploaded an image: image.png (24KB) < https://matrix.org/_matrix/media/v1/download/matrix.org/FcKOkZLwxheykqitmNudqnWA > | 03:40 | |
| xobs | I'm amazed that error is even /in/ Windows still: | 03:40 |
| xobs | mithro: this is still in simulation, correct? | 03:54 |
| mithro | xobs: yes | 03:54 |
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| felix_ | mithro: for a parallel crc implementation https://github.com/enjoy-digital/liteeth/blob/master/liteeth/core/mac/crc.py is worth a look | 21:26 |
| tpb | Title: liteeth/crc.py at master · enjoy-digital/liteeth · GitHub (at github.com) | 21:26 |
| felix_ | my sdi crc is a modified version of that code and i'm planning have one generic crc implementation that is customizeable enough to be used in liteeth, litesata and photonsdi (not sure if there's also a crc implementation in litepcie) | 21:26 |
| mithro | felix_: doah! Should have thought of that... | 22:23 |
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| mithro | felix_: I bet _florent_'s version users a lot less resources then mine... | 22:29 |
| felix_ | oh. but i also had implemented my own parallel crc (that didn't work for the sdi case, since they count the crc state bits in the other direction) and then moved to florents crc implementation, becaus ethat was much nicer to debug | 22:29 |
| felix_ | apart from the last block it's pure python, so i could just add a print statement and see if i get the expected xor lists for the different bits | 22:30 |
| felix_ | _florent_: what do you think about the idea to factor out things like the crc into litex/litex/buildingblocks/ (or something like that or maybe a seperate lite* project) ? from photonsdi i'll eventually have crc, lfsr en/decoder, hamming en/decoder and maybe bch if i'll get to implement the audio side, that aren't sdi specific and are likely useful for other things too. of course only after the code i | 22:35 |
| felix_ | have is tested, debugged and has some test cases | 22:35 |
| _florent_ | felix_: yes sure, for modules that are generic enough, we could put them in litex | 22:38 |
| _florent_ | mithro: where is your CRC? | 22:38 |
| felix_ | yeah, i'll make them a bit more generic before that, but wanted to know if you'd like the idea before i spend time on that | 22:40 |
| _florent_ | mithro: the synthesis tool should also be able to the optimization that are done in liteeth crc, it was just done here to avoid polluting to much the generated verilog | 22:40 |
| _florent_ | mithro: so not sure it use less ressources | 22:40 |
| mithro | _florent_: https://github.com/mithro/valentyusb/blob/usb12/valentyusb/usbcore/tx/crc.py#L192-L491 | 23:34 |
| tpb | Title: valentyusb/crc.py at usb12 · mithro/valentyusb · GitHub (at github.com) | 23:34 |
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| ewen | mithro: While attempting to build Linux for Arty (re-testing LCA2018 workshop) I'm running into issue building linux, saying it cannot find stdarg.h (which is part of gcc) while building scripts/mod/devicetable-offsets.s. Have you seen this before? | 23:44 |
| ewen | mithro: I *think* I've now conda updated enough things (but possibly not). | 23:44 |
| mithro | ewen: Hrm, CarlFK[m] has done that recently... | 23:44 |
| ewen | CarlFK[m]: ^^^ Did you run into stdarg.h missing issue? Did you find a fix? | 23:45 |
| CarlFK[m] | mithro that doesn't sound familiar. I'll have a look in 30 minutes to an hour and see what the state of things is | 23:46 |
| CarlFK[m] | ewen: what is your schedule like for the next 4 hours, I can shuffle things around to help you get going | 23:46 |
| ewen | CarlFK[m]: Thanks. I'll keep exploring and see if I can figure out why it can't find it. (There are multiple stdarg.h files in what look like relevant places.) | 23:46 |
| ewen | CarlFK[m]: No rush. I'm just doing a re-test of things that worked in 2018, before LCA2019 hackathon... | 23:47 |
| mithro | ewen: Will you be at LCA? | 23:47 |
| ewen | mithro: Yes. And at the LCA2019 pre-hackathon from Thursday (next week). | 23:47 |
| mithro | ewen: Oh, awesome! | 23:48 |
| mithro | ewen: I will be bringing Fomu hardware! | 23:48 |
| CarlFK[m] | ewen: URL you are working from? | 23:48 |
| ewen | mithro: Great! I'd hoped you would. | 23:48 |
| ewen | CarlFK[m]: https://github.com/timvideos/litex-buildenv/wiki/HowTo-LCA2018-FPGA-Miniconf (which is a Wiki translation of the Google Doc from LCA2018 tutorial, translated by mithro I think) | 23:49 |
| tpb | Title: HowTo LCA2018 FPGA Miniconf · timvideos/litex-buildenv Wiki · GitHub (at github.com) | 23:49 |
| CarlFK[m] | Good, wanted to make sure you weren't working off the original Google doc. Okay, I'm off for 20 to 30 minutes | 23:49 |
| ewen | mithro: Testing by hand with "make V=1" (to show full commands) it looks like or1k-elf-newlib-gcc is launched with "-nostdinc -isystem /src/fpga/litex-buildenv/build/conda/bin/../lib/gcc/or1k-elf/5.4.0/include ...", but now the compiler is updated to newer version so that directory does not exist. | 23:58 |
| ewen | mithro: now: or1k-elf-newlib-gcc (8.2.0_3006_g592479378c3) 8.2.0 | 23:59 |
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