Friday, 2018-10-26

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cr1901_modern_florent_: Strangely enough I'm not able to duplicate your vexriscv crash. Do you have a checked out copy of litex-buildenv so you could check something?09:44
cr1901_modernI _was_ able to get a crash, but not in the way you said it would happen09:45
cr1901_modern_florent_: After updating vexriscv-verilog to the tip of master in litex, litex to master, and litedram to master, in litex-buildenv, I don't see a problem.10:16
cr1901_modernThe SoC generated works fine10:16
cr1901_modern... ... ... okay, WHAT? _Now_ I can duplicate10:54
cr1901_modernString... arty doesn't have a self.flash_boot_address parameter12:32
cr1901_modernstrange*, not string bleh12:34
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_florent_futaris[m]: we can use multiple porte with LiteETH, but we don't have support for link aggregation for now15:51
_florent_cr1901_modern: if you use latest litex/litedram, you won't have the issue since i reverted the vexriscv submodule15:52
_florent_cr1901_modern: you need to use latest vexriscv to have the issue15:52
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CarlFKAvnet/Digilent Arty Evaluation Board ... BTN0: Print PWM value.18:17
CarlFKhttps://github.com/timvideos/litex-buildenv/wiki/HowTo-LCA2018-FPGA-Miniconf18:17
tpbTitle: HowTo LCA2018 FPGA Miniconf · timvideos/litex-buildenv Wiki · GitHub (at github.com)18:17
CarlFKI was expecting an hdmi2usb prompt - is there a thing I should look for other than "an error" ?18:18
CarlFKnm -      raise OSError("Unable to locate Vivado directory or settings.")18:18
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mithronrossi: Were did you get up to with the issue around the proprietary FPGA toolchains like Vivado and ISE?22:44

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