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| shorne | I think I am going to have to bisect this issue, we know it was working last year. Maybe its qemu. | 00:09 |
|---|---|---|
| shorne | I debugged it but its something stange happening in ioremap for the UART | 00:09 |
| shorne | which is the only ioremap we really need to do | 00:10 |
| Toba | cr1901_modern: hey are you on? Tim says to poke you about micropython | 00:10 |
| Toba | I am trying to understand how to improve the memory availability for of the FuPy Arty A7 | 00:11 |
| cr1901_modern | Toba: I've yet to try FuPy on the Arty, tbh. Tim's gonna have to be more specific- aren't we already running Micropython from DRAM anyway on that board? | 00:12 |
| Toba | yes but the stack appears to be mapped to sram | 00:13 |
| Toba | and I don't know how micropython figures out where to put its heap | 00:13 |
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| cr1901_modern | Hmmm, running out of sram? | 00:16 |
| mithro | cr1901_modern: See Toba mention, it seems like micropython is using the sram for the stack / heap | 00:17 |
| mithro | cr1901_modern: But running from DRAM | 00:17 |
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| cr1901_modern | mithro: Yes, that's because of of this line: https://github.com/fupy/micropython/blob/master/ports/fupy/litex.ld#L57 | 00:17 |
| tpb | Title: micropython/litex.ld at master · fupy/micropython · GitHub (at github.com) | 00:17 |
| cr1901_modern | Change "sram" to "main_ram" and that will move your stack to DRAM | 00:18 |
| mithro | cr1901_modern: Yes, that is where we got too :-P | 00:18 |
| mithro | cr1901_modern: And now Toba is learning about linker scripts :-P | 00:18 |
| cr1901_modern | So what's the problem then? :P | 00:18 |
| cr1901_modern | Do you want me to give a tutorial on linker scripts or something? | 00:19 |
| Toba | no, I think you've answered the question | 00:20 |
| cr1901_modern | Toba: You may wish to move .bss to main_ram as well for consistency;. | 00:23 |
| Toba | yeah it already is in the branch I'm on | 00:23 |
| Toba | I'm on master | 00:23 |
| Toba | of micropython | 00:23 |
| Toba | the master of this repo //github.com/fupy/micropython.git | 00:24 |
| cr1901_modern | https://github.com/fupy/micropython/blob/master/ports/fupy/litex.ld#L54 It's not on my copy | 00:24 |
| tpb | Title: micropython/litex.ld at master · fupy/micropython · GitHub (at github.com) | 00:24 |
| Toba | oh wait no it's not, I already had done that | 00:24 |
| Toba | because it seemed like I should | 00:24 |
| Toba | https://pastebin.com/v047kZBF | 00:25 |
| tpb | Title: main_ram vs sram - Pastebin.com (at pastebin.com) | 00:25 |
| Toba | but isn't this going to try to put the stack at the same part of RAM that the micropython code is already being loaded into | 00:25 |
| Toba | do I need to align it differently? I'm not really sure what PROVIDE(_fstack really means | 00:25 |
| Toba | I guess that's just defining _fstack? | 00:26 |
| cr1901_modern | Yes, it's defining _fstack at the very end of main_ram | 00:26 |
| cr1901_modern | and it's subtracting 4 because the CPUs that micropython use have a stack that by convention points to the "next free slot" | 00:27 |
| Toba | and the lm32 cpu is 4 byte aligned? | 00:27 |
| cr1901_modern | the ABI wants the stack 4 byte aligned, yes | 00:28 |
| Toba | https://www.math.utah.edu/docs/info/ld_3.html#SEC13 so it's already counting memory down ward in the stack anyways? Is the system smart enough to not smash the stack into the space allocated by the linker? | 00:28 |
| tpb | Title: Using LD, the GNU linker - Command Language (at www.math.utah.edu) | 00:28 |
| Toba | and I shouldn't need to use MEMORY to do this? | 00:28 |
| Toba | sorry for the stray link, I was going in that direction before you pointed out it's happening at the very end of main_ram - by end I assume you mean the high end of the addresses? | 00:29 |
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| cr1901_modern | mithro: Btw, the Opsis HDMI2USB firmware has captured plenty of conferences; the sram wouldn't be nearly enough for global buffers. How does the HDMI2USB handle this? | 00:29 |
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| cr1901_modern | Toba: LiteX handles defining memory regions | 00:29 |
| cr1901_modern | you can see this under software/include/generated/regions.ld | 00:30 |
| Toba | oh I was wondering where the generate folder is | 00:30 |
| Toba | since that is INCLUDEd by the litex ld | 00:30 |
| * Toba looks | 00:30 | |
| cr1901_modern | >Is the system smart enough to not smash the stack into the space allocated by the linker | 00:32 |
| cr1901_modern | The linker can detect overlapping regions, and whether globals don't fit into a region. But it can't really say much about stack usage b/c that's unknown until runtime. You just PROVIDE it a var where the stack starts and hope for the best. | 00:32 |
| cr1901_modern | The startup code will take that value of _fstack and initialize the stack pointer | 00:32 |
| Toba | so there's no way to tell micropython where to put the brakes on and stop trying to put things onto the stack? | 00:32 |
| Toba | what about the python heap? | 00:33 |
| mithro | cr1901_modern: The frame buffers are stored in DDR ram | 00:33 |
| cr1901_modern | cr1901_modern: How do you enforce that if .bss is pointing to sram? | 00:34 |
| cr1901_modern | Toba: I don't think micropython is designed to do that, no. I guess in principle you could add that and micropython could check. | 00:35 |
| cr1901_modern | mithro: How do you enforce that frame buffers are in DDR RAM if .bss is pointing to sram? | 00:35 |
| mithro | cr1901_modern: The frame buffers just write to a random memory location | 00:37 |
| mithro | cr1901_modern: https://github.com/timvideos/litex-buildenv/blob/master/firmware/framebuffer.h | 00:37 |
| tpb | Title: litex-buildenv/framebuffer.h at master · timvideos/litex-buildenv · GitHub (at github.com) | 00:37 |
| cr1901_modern | Well... that's one way of doing it :P | 00:38 |
| mithro | cr1901_modern: It's bare metal C, all bets are off :-P | 00:40 |
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| mithro | cr1901_modern: https://github.com/timvideos/HDMI2USB-litex-firmware/issues/250 | 00:40 |
| tpb | Title: Fix the framebuffer allocations · Issue #250 · timvideos/HDMI2USB-litex-firmware · GitHub (at github.com) | 00:40 |
| Toba | I kind of think the problem is the heap not the stack | 00:41 |
| Toba | since the errors I'm getting are gc ones | 00:41 |
| Toba | Hm, I guess it's not errors so much as gc debugger output. | 00:42 |
| cr1901_modern | gc output is normal | 00:42 |
| cr1901_modern | if gc failure happens, it'll say so :P | 00:42 |
| Toba | ah yes there is good old MemoryError | 00:43 |
| cr1901_modern | Are you getting those or not? | 00:44 |
| Toba | I was able to get one pretty easily, the entire heap appears to be 1984 bytes | 00:44 |
| Toba | GC: total: 1984, used: 1296, free: 688 | 00:44 |
| cr1901_modern | Yea something seems grossly wrong with that | 00:44 |
| Toba | yup | 00:45 |
| cr1901_modern | Idk right now :P, sorry :( | 00:45 |
| Toba | is master the branch of micropython to be using here | 00:45 |
| cr1901_modern | yes | 00:45 |
| Toba | I mean is that where all the latest development code is for the fupy port | 00:46 |
| Toba | because I would hate to be duplicating effort | 00:46 |
| cr1901_modern | yes, afaik | 00:46 |
| Toba | ok | 00:46 |
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| mithro | Toba: ewen who doesn't seem to be here at the moment might know more | 00:47 |
| Toba | ok | 00:47 |
| cr1901_modern | Toba: Found the culprit https://github.com/fupy/micropython/blob/master/ports/fupy/main.c#L37 | 00:50 |
| tpb | Title: micropython/main.c at master · fupy/micropython · GitHub (at github.com) | 00:50 |
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| cr1901_modern | Assuming MICROPY_ENABLE_GC is, well, enabled (Idk if it is) | 00:50 |
| cr1901_modern | But heap[2048]; is gonna be put into BSS | 00:50 |
| Toba | ah yes in main.c | 00:55 |
| Toba | that would do it | 00:55 |
| Toba | and bss is in main_ram now on my copy | 00:55 |
| Toba | so I just need to make this bigger and rebuild | 00:55 |
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| cr1901_modern | Right. Probably a better solution is to size it based on how large regions.ld is, but Idk a nice way to do that without relying on _fbss or linker provided variables | 00:56 |
| cr1901_modern | (IMO only the startup code should need to access those) | 00:56 |
| cr1901_modern | We can probably use SRAM_BASE/MAIN_RAM_BASE for this | 01:00 |
| cr1901_modern | SRAM_SIZE/MAIN_RAM_SIZE* | 01:02 |
| cr1901_modern | char heap[3*SRAM_SIZE/4]; for instance (25% left) | 01:02 |
| cr1901_modern | Toba: I need to rest for tonight, but hope that helps a bit :) | 01:04 |
| Toba | I just hard coded it to 192 mb | 01:05 |
| Toba | since IIRC there is 256 mb on the chip on the arty a7 | 01:06 |
| cr1901_modern | Well that's gonna break my tinyfpga port, which has... 10kB of SRAM? ;) | 01:06 |
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| Toba | OK, I see what you mean if I try to make a PR or something I will be more reasonable about it | 01:06 |
| cr1901_modern | But fair enough | 01:06 |
| Toba | that is a good point about just picking 75% - is there a good place to put end-user configuration stuff | 01:06 |
| Toba | such that someone rolling a micropython firmware could make their own decision and configure it? | 01:07 |
| cr1901_modern | I don't think so right now. Maybe it should be configured as an attribute per FPGA platform. | 01:08 |
| cr1901_modern | that generates a constant into software/include/generated/csr.h or something | 01:08 |
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| CarlFK | pzieba[m]: hi! | 02:41 |
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| mithro | https://www.crowdsupply.com/alphamax/netv2 | 03:16 |
| tpb | Title: NeTV2 | Crowd Supply (at www.crowdsupply.com) | 03:16 |
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| shorne | well, I switched to the old version of qemu, still same issue but at least debugging works better now. Something with recent MMU changes broke gdb | 07:12 |
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| shorne | oh, and with better logging and a quick hack kernel boots | 07:31 |
| shorne | so... I am not sure what changed, I updated early con from using a 4K IO range (which was causing overflow in ioremap) to a 256 byte iorange | 07:33 |
| shorne | and everything works fine | 07:33 |
| shorne | [ 1.570000] Freeing unused kernel memory: 3168K | 07:33 |
| shorne | [ 1.570000] This architecture does not have kernel memory protection. | 07:33 |
| shorne | Starting logging: OK | 07:33 |
| shorne | Initializing random number generator... done. | 07:33 |
| shorne | Starting network: OK | 07:33 |
| shorne | Starting dropbear sshd: OK | 07:33 |
| shorne | Welcome to Buildroot | 07:33 |
| shorne | buildroot login: | 07:33 |
| shorne | We didnt have to do this hack before | 07:34 |
| shorne | CarlFK: I am posting 2 patches to https://github.com/stffrdhrn/linux/tree/litex-arty-201809 | 07:50 |
| shorne | that should fix the linux boot | 07:50 |
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| mithro | shorne: Great! | 12:37 |
| mithro | cr1901_modern: Did you end up adding a "lite" target for the vexriscv? | 12:38 |
| mithro | cr1901_modern: And did those boards turn up? | 12:39 |
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| mithro | nrossi: How goes meta-hdl layer? | 12:58 |
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| mithro | shorne: Yay! It seems to work for me in qemu! | 13:06 |
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| cr1901_modern | mithro: >Did you end up adding a "lite" target for the vexriscv? Yes, but it's not really tested | 13:15 |
| cr1901_modern | >And did those boards turn up? Yes, sorry, forgot to mention :P | 13:15 |
| mithro | cr1901_modern: It doesn't exist in litex yet? | 13:21 |
| mithro | cr1901_modern: Or do I need to roll third_party again? | 13:21 |
| mithro | cr1901_modern: FYI -> https://travis-ci.org/mithro/litex-buildenv/builds/435238093 | 13:21 |
| mithro | cr1901_modern: Much greeness :-P | 13:21 |
| mithro | Going to find breakfast with CarlFK now | 13:22 |
| mithro | cr1901_modern: This might be the most interesting for you -> https://travis-ci.org/mithro/litex-buildenv/jobs/435238116 | 13:22 |
| mithro | C=picorv32 P=tinyfpga_bx F=stub T=base | 13:23 |
| cr1901_modern | mithro: My branch for vexriscv litex isn't pushed yet. | 13:23 |
| cr1901_modern | I've been busy the last few days, but let's see if I can't finalize the tinyfpga stuff today | 13:24 |
| cr1901_modern | at present, when I pulled LiteX to the most recent commit, I managed to break the firmware | 13:24 |
| cr1901_modern | the micropython* firmware | 13:24 |
| cr1901_modern | Also, cool picorv32 works :P | 13:25 |
| mithro | No idea if it boots, but it builds | 13:25 |
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| cr1901_modern | mithro: Are you around? | 15:33 |
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| cr1901_modern | It's time to merge in tinyfpga micropython: https://github.com/timvideos/litex-buildenv/pull/67 | 15:35 |
| tpb | Title: firmware: Update litex submodule, Makefiles, and linker scripts to support crt0-flash startup code. by cr1901 · Pull Request #67 · timvideos/litex-buildenv · GitHub (at github.com) | 15:35 |
| cr1901_modern | https://github.com/fupy/micropython/pull/51 | 15:35 |
| tpb | Title: Add support for LiteX boards which run their main program from flash. by cr1901 · Pull Request #51 · fupy/micropython · GitHub (at github.com) | 15:35 |
| cr1901_modern | Both are these are safe to merge IMO | 15:36 |
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| cr1901_modern | Toba, mithro: https://github.com/fupy/micropython/blob/master/ports/teensy/mk20dx256.ld#L153-L172 Referencing linker-provided vars inside main.c isn't personally my favorite thing to do, but we should probably do something like this to set up heap space https://github.com/fupy/micropython/blob/master/ports/teensy/main.c#L267 | 16:01 |
| tpb | Title: micropython/mk20dx256.ld at master · fupy/micropython · GitHub (at github.com) | 16:01 |
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| mithro | cr1901_modern: I'll merge it after I confirm my stuff works | 16:23 |
| cr1901_modern | mithro: Excellent, I'm looking up info about the single port RAM now. It's definitely fine for system memory, but granularity is low; there's essentially only 4 RAMs in a up5k device | 16:26 |
| cr1901_modern | I'll probably just make a wishbone Migen wrapper that instantiates it. Probably should go under LiteX cores? | 16:26 |
| cr1901_modern | Alternatively I could add arty-s7 support, which is simple enough for an afternoon | 16:29 |
| cr1901_modern | (I think) | 16:29 |
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| cr1901_modern | daveshah: There's no passes in yosys currently that handle the single-port RAM, correct? | 16:42 |
| daveshah | cr1901_modern: no, unfortunately not | 16:43 |
| daveshah | This will soon be a higher priority to me, as the same code would also be used to handle true-dual port RAMs in ECP5 and Xilinx | 16:43 |
| cr1901_modern | That might actually be good in my case; I don't want "RAM used by cache/peripherals" to accidentally be put into single-port RAM | 16:43 |
| daveshah | Yes, on the iCE40 it's usually fine to control SPRAM use anyway | 16:43 |
| cr1901_modern | I'm prob gonna create a wishbone SP_RAM interface which supports only 32-bit width and either 16k or 32k depth | 16:45 |
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| Toba | cr1901_modern: I follow you, kinda. I might be able to get that to work. | 17:17 |
| Toba | cr1901_modern: So in mk20dx256.ld, line 171 is defining the HEAP_END - that's what assigning to a linker var that starts with an _ does? | 17:19 |
| cr1901_modern | Toba: No, _heap_end appears to be unused in main.c | 17:21 |
| cr1901_modern | https://github.com/fupy/micropython/blob/master/ports/teensy/main.c#L140 The person who wrote the linker script opted to define _heap_end, but HEAP_END is actually defined here | 17:22 |
| tpb | Title: micropython/main.c at master · fupy/micropython · GitHub (at github.com) | 17:22 |
| Toba | oh | 17:22 |
| Toba | well you said it was using linker-provided vars | 17:23 |
| Toba | I guess _heap_start is the one you meant | 17:23 |
| Toba | (slaps forehead) | 17:23 |
| cr1901_modern | yes, by "vars" I meant one or more, sorry :P | 17:23 |
| cr1901_modern | It's not _wrong_ to reference linker vars in main.c, I just don't like it :) | 17:24 |
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| CarlFK | shorne: Toba: woot! qemu # cat /proc/cpuinfo | 17:51 |
| CarlFK | cpu: OpenRISC-0 | 17:51 |
| Toba | hooray | 17:54 |
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| CarlFK | shorne: linux on qemu boots, same on arty stuck at the same: Executing booted program at 0x40000000 | 18:13 |
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| Toba | CarlFK: does it basically not provide you any way to know if it's working beyond that point? | 18:22 |
| CarlFK | Toba: 'yes' | 18:22 |
| Toba | does it normally offer open ports over ethernet or something and that's how you would know it's working? | 18:23 |
| CarlFK | Toba: same visual as when it wasn't working with qemu, and shorne was mumbling "device tree" | 18:23 |
| Toba | hm. | 18:23 |
| Toba | I know some of those words. | 18:23 |
| CarlFK | same | 18:23 |
| CarlFK | I leanred a bit about it on my way to bean and bagel this morning | 18:24 |
| CarlFK | my guess is the arty device tree isn't (additive)ly (verb) | 18:25 |
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| CarlFK | http://paste.ubuntu.com/p/XwfZsSfTXr/ [FLTERM] Booting the device... Executing booted program at 0x40000000 | 18:26 |
| tpb | Title: Ubuntu Pastebin (at paste.ubuntu.com) | 18:26 |
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| cr1901_modern | _florent_: In arty a7 platform file, why are the cd_sys4x and cd_sys4x_dqs configured as reset_less? | 20:01 |
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| CarlFK | shorne: Toba: woot!!! on Arty!!! # cat /proc/cpuinfo | 20:19 |
| CarlFK | cpu architecture: OpenRISC 1000 (1.1-rev0) | 20:19 |
| mithro | pzieba[m]: https://github.com/timvideos/HDMI2USB/wiki/History-of-the-Project | 20:27 |
| tpb | Title: History of the Project · timvideos/HDMI2USB Wiki · GitHub (at github.com) | 20:27 |
| Toba | CarlFK: neato | 20:30 |
| mithro | CarlFK: https://travis-ci.org/timvideos/HDMI2USB-litex-firmware/builds/435284855 | 20:33 |
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| CarlFK | two linuxs booted!!! | 20:59 |
| Toba | at once? | 21:00 |
| Toba | did you put 2 soft cpus on in the fpga at once? | 21:01 |
| Toba | that could be pretty cool | 21:01 |
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| shorne | CarlFK: did you change anything to fix arty? | 21:42 |
| CarlFK[m] | Toba no Peter got his working also | 21:55 |
| Toba | oh | 21:56 |
| CarlFK[m] | <freenode_sho "CarlFK: did you change anything "> shorne just ran the install and build and run Scripts | 21:56 |
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| mithro | https://travis-ci.org/timvideos/litex-buildenv/builds/435284129 | 22:35 |
| mithro | It's green! | 22:35 |
| mithro | CarlFK: 340 should be there now | 22:39 |
| cr1901_modern | mithro: Awesome, can we try merging my stuff next :)? | 22:43 |
| mithro | cr1901_modern: when I get into the air, I plan to merge the LiteX roll | 22:44 |
| cr1901_modern | Alright then. I am clearly not being productive today, so I'm gonna take the rest of the day off :P | 22:44 |
| cr1901_modern | (what's left of it anyway) | 22:44 |
| mithro | cr1901_modern: https://travis-ci.org/timvideos/litex-buildenv/builds/435352721 | 22:45 |
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| cr1901_modern | mithro: Hopefully the damn thing _stays_ green this time | 22:51 |
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| cr1901_modern | mithro: Please don't like your own tweets :P | 22:58 |
| mithro | cr1901_modern: why not? Someone has too :-P | 22:59 |
| cr1901_modern | It's a pet peeve of mine when others do it. Ditto for when ppl fav their own github repositories | 22:59 |
| cr1901_modern | (which of course friends have done on purpose anyway b/c they know I hate it) | 22:59 |
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| cr1901_modern | What happens when litex-buildenv reaches 200 supported configurations :P? | 23:07 |
| cr1901_modern | Also is vexriscv currently not being build? | 23:08 |
| cr1901_modern | built* | 23:08 |
| cr1901_modern | oh nevermind | 23:08 |
| cr1901_modern | I missed it | 23:09 |
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| CarlFK | mithro: off to a good start - 340 boots: git describe: v0.0.4-340-g3fb4e7c | 23:38 |
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