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| xobs | Can I get some Python help? I'm trying to port the debug bridge from C to Python, and I'm having trouble formatting data. | 07:31 |
|---|---|---|
| xobs | The format of the packet is {uint8_t, uint8_t, uint32_t, uint32_t}, but when I do 'struct.unpack("?II", data)' it complains "unpack requires a buffer of 12 bytes". Why is "?II" or even "BII" a 12-byte struct? Shouldn't it be 9 bytes? | 07:32 |
| daveshah | This is because C structs usually have alignment bytes for fast access | 07:32 |
| xobs | daveshah: Right, I declare my C struct as __packed__. | 07:33 |
| daveshah | Yeah, IIRC you have to add a character at the start to tell Python unpack that | 07:34 |
| daveshah | = or < I think | 07:35 |
| xobs | That gives "bad char in struct format"... | 07:37 |
| xobs | Oh, okay. It needs to be the first character. | 07:37 |
| xobs | Is there a Python equivalent of "uint32_t"? The struct documentation seems to indicate that "I" can vary depending on the system. | 07:38 |
| cr1901_modern | or better yet, the compiler :'D | 07:38 |
| daveshah | I think the solution for that is to use I but make sure you have it set to standard size mode | 07:39 |
| cr1901_modern | erm I didn't even know python could handle __packed, and I don't know if there's an equivalent to uint32_t | 07:39 |
| daveshah | = or < at the start should do that | 07:39 |
| xobs | Hooray, I think that Works for Me. Almost have this thing ported to Python. | 07:40 |
| xobs | Thanks! | 07:40 |
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| xobs | And with that, the debug bridge now works in Python. Thakns for your help. | 08:20 |
| xobs | Actually... how many FPGAs expose xadc_temperature? Is that just something Bunnie did on NeTV2? | 08:22 |
| daveshah | I've accessed it over JTAG on boards I've built without doing anything special | 08:22 |
| daveshah | Never tried to access it from fabric, but I assume it would also work | 08:23 |
| daveshah | Think all the 7-series parts have the XADC built in | 08:23 |
| xobs | I'm asking because the vexriscv tool I wrote checks that register first (as a kind of test to make sure the network is working), but now that I think about it I don't know that I can rely on its existence. | 08:24 |
| daveshah | Yeah, don't think that will work for pre-7-series Xilinx or other vendors | 08:26 |
| xobs | Okay, I'll remove that then. | 08:27 |
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| _florent_ | xobs: yes that's better removing the xadc check since this is only valid for 7-series and if xadc core is instanciated | 09:02 |
| _florent_ | xobs: but you can add a scrach register to your debug code and check write/read to it | 09:02 |
| _florent_ | xobs: or we should add a scratch register to all core, since this is something that can use useful for various things... | 09:03 |
| xobs | _florent_: fair enough. I removed that check in the latest PR. And documented the rough steps at https://github.com/timvideos/litex-buildenv/wiki/Debugging | 09:05 |
| tpb | Title: Debugging · timvideos/litex-buildenv Wiki · GitHub (at github.com) | 09:05 |
| _florent_ | xobs: ok thanks | 09:05 |
| _florent_ | xobs: have you been able to test with the changes i did to use the variant parameter? | 09:05 |
| xobs | _florent_: I'll synthesize a new bitstream now. I thought Bunnie's version of the litex repo was special, but now that I look the only change of note is the addition of a write_checkpoint(). | 09:12 |
| _florent_ | ok thanks. | 09:12 |
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| xobs | _florent_: it's working well with the variant parameter. | 09:24 |
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| xobs | Actually, I think I may have found an issue with c821a0feab5 that breaks access to reading the DATA register. I'll make a PR once this test build is done. | 10:18 |
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