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| xobs | futarisIRCcloud: That's what I've got going, yes. GDB over Ethernet. The Wishbone interface is super janky, and I suspect it's possible to hook it up much better. Right now I'm manually strobing the VALID line, for example, and writing directly to both the DATA and ADDRESS registers. | 02:14 |
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| xobs | I'm guessing the 8-bit limitation comes from wishbonebridge.py:WishboneStreamingBridge which seems to hardcode 8-bit values. I think I understand the design reasons behind that decision. | 02:51 |
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| _florent_ | xobs: we are using 8-bit CSRs since it seems to reduce resources usage on CSR bus, but you can also use 32-bit CSRs | 06:18 |
| _florent_ | you just have to set csr_data_width=32 in the SoC | 06:19 |
| _florent_ | if you are using the 8-bit CSRs and want atomic writes, you have to use the atomic write parameter on the CSR register | 06:19 |
| _florent_ | the wishbone bridge works for 8-bit and 32-bit, so if you find more convenient to work with 32-bit registers you can use that | 06:21 |
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| xobs | _florent_: I see, thank you. 32-bit access might improve performance for VexRisc-V debugging. I'll have to check. | 06:31 |
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| xobs | _florent_: Would you be amenable to a patch that replaced MMPTR() in csr.h with a readl()/writel()/readb()/writeb() implementation? That way I can #include "csr.h" in some code running on my PC and call the accessors in csr.h, as long as I provide an EtherBone implementation of those functions. | 09:36 |
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| _florent_ | xobs: yes, that's fine. If you do that, you can add a parameter to the get_csr_header function to enable that. | 12:48 |
| xobs | Hmm... I set a 32-bit csr width, but pokes into RAM are only updating the bottom 16 bits. I wonder if Bunnie used 16-bit DDR, and it's not properly splitting the writes. | 13:10 |
| CarlFK | xobs futaris[m]: HI! I have a friend in Chicago that wants to try writing the linux driver side of the "Love-Rusty 3000" ... and I may be able to find someone to do the fpga side of that... but I am not lost and need directions ... help? | 13:37 |
| xobs | CarlFK: Love-Rusty 3000? | 13:41 |
| CarlFK | Creating a peripheral providing the Love-Rusty 3000 feature set and adding to your SoC. https://linux.conf.au/programme/miniconfs/fpga/ | 13:41 |
| tpb | Title: linux.conf.au 2018 - Sydney 22-26 January 2018 (at linux.conf.au) | 13:41 |
| CarlFK | https://docs.google.com/document/d/e/2PACX-1vTCbsWycq6HTfIet-ynicf76VEKOLt_k_Bya3OOWKpDCZL3yIphy-CR5GNfPaQCfUt0PUIHDY_ugxWL/pub#h.6bcdftf66eq4 | 13:41 |
| tpb | Title: Love Rusty 3000 - Techsheet (at docs.google.com) | 13:41 |
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| xobs | Huh. I don't remember the Love-Rusty bit from the workshop. Strange. What do you need direction towards? | 13:47 |
| CarlFK | it was planned to be in the workshop, but got pulled due to non existence ;) | 13:48 |
| CarlFK | I'm trying to play manager and get people to do the work to make it exist | 13:49 |
| CarlFK | I have a people that wants to work, not I need to give her something to work on | 13:50 |
| CarlFK | not/now | 13:50 |
| CarlFK | I think the goal is for the workshop to include: user space C code -> linux driver C code -> fpga defined hardware (something outside the linux/soft cpu ... space?) | 13:53 |
| xobs | Well, the general order of operations seems to be Hardware -> Software, so getting the FPGA stuff done first, then poke bits from userspace. | 14:50 |
| CarlFK | sure - but at some point there should be some sort of spec - if that exists the linux driver side can be done now and fixed later if the spec changes | 15:32 |
| CarlFK | given I have someone that wants to write the driver right now | 15:33 |
| CarlFK | and if I had said spec, I might be able to get someone to do the hardware side right now too | 15:33 |
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| TheAssassin | mithro: re. scaler thingy: couldnt the netv 2 be suitable for this purpose? | 23:43 |
| TheAssassin | (topic's coming from #voc-lounge) | 23:44 |
| mithro | TheAssassin: If you want 1080p60 as your highest resolution - yes | 23:44 |
| TheAssassin | I assume that's good enough :) | 23:44 |
| TheAssassin | I need to sell this atlys device soon | 23:44 |
| mithro | TheAssassin: Having an Atlys will let you debug if the issue is with the NeTV2 or with the code... | 23:47 |
| TheAssassin | sure... but I guess I'll be more of a consumer of your stuff than being able to contribute | 23:48 |
| TheAssassin | I'm an open source dev | 23:48 |
| TheAssassin | I don't have those 8 hour days where you come home and know "now I have a few hours for other stuff" :) | 23:48 |
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| TheAssassin | mithro: if one of your GSoC in Europe should need an atlys, though, they may contact me | 23:51 |
| TheAssassin | GSoC students* | 23:51 |
| futarisIRCcloud | CarlFK: doing software/firmware/drivers first is doable. But generally hardware is done first, because it gets "fixed" in a IC first. top down vs bottom up. | 23:52 |
| futarisIRCcloud | CarlFK: For a soft version, write a user-space app, then convert it to a kernel driver. Get someone to write the Verilog / hardware, and replace the soft call in the driver to use the hardware offload. | 23:53 |
| CarlFK | futarisIRCcloud: to get someone to write anything I need description of what this stuff will do | 23:56 |
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