Tuesday, 2017-11-14

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shornehttps://lwn.net/Articles/132804/08:38
tpbTitle: Big-endian I/O memory [LWN.net] (at lwn.net)08:38
shorneThis article is a bit interesting, part of my fix for uart is to use ioread32be, but this says that most hardware should be little endian.08:39
shorne_florent_: mithro: is this as expected with the litex components?08:40
shenkiah. that's why things were a bit strange08:41
shenkiall of the kernel's accessors assume LE: readb, ioread32, etc08:42
shenkioh, i wonder if that's why my ethernet driver is not working08:55
shenki:D08:56
_florent_shorne/shenki: peripherals have CSR registers that are exposed on the Wishbone bus08:57
_florent_but a CSR is only 8 bits of a Wishbone access (ie 8 bits per 32 bits)08:57
_florent_the 8 bits of the CSR are on the LSB08:58
_florent_so for CSR that are on more that 8 bits, let's say N*8 bits you have to do N wishbone accesses08:59
_florent_you have to look at the generated csr.h to know the size of the CSR08:59
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shorne_florent_: I see, I noticed for some accesses byte access was fine, but for some wider accesses it required using ioread32be.09:15
shorneshenki: I guess for us (at lease on openrisc) we can stick with ioread/write32be.09:15
shenkishorne: ok09:30
shenki_florent_: thanks for explaining09:31
shenkiwe need something to reset now that we have console09:31
shenki# reboot -f09:31
shenkireboot: Restarting system09:31
shenki*** MACHINE RESTART ***09:31
shenki#09:31
shenki_florent_: any ideas on how to debug the mdio reads?11:10
shenki_florent_: the hdmi2usb firmware gets back all Fs11:10
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shorneshenki: yeah, reboot is currently implemented by a special l.nop in simulators, nothing was ever put in place in hardware21:55
shorneI discussed it a bit earlier this user, to use the Power Management modes to trigger reboot21:56
shorneBut it needs to more discussion21:56

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