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mithro | https://github.com/embecosm/chiphack | 03:24 |
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tpb | Title: GitHub - embecosm/chiphack: Repository and Wiki for Chip Hack events. (at github.com) | 03:24 |
mithro | https://github.com/embecosm/chiphack/wiki | 03:24 |
tpb | Title: Home · embecosm/chiphack Wiki · GitHub (at github.com) | 03:24 |
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cr1901_modern | _florent_: I | 06:33 |
cr1901_modern | 'm overall rather confused by your S6 DDR PHY | 06:33 |
cr1901_modern | Why doesn't any of the data bits appear to go through an ODDR2? https://github.com/enjoy-digital/litedram/blob/master/litedram/phy/s6ddrphy.py#L261-L262 | 06:33 |
tpb | Title: litedram/s6ddrphy.py at master · enjoy-digital/litedram · GitHub (at github.com) | 06:33 |
rohitksingh | cr1901_modern: iirc S6 has hard-silicon DDR PHY...Most likely that's why you do not see ODDR2. | 06:49 |
rohitksingh | cr1901_modern: On actually checking the the url you linked above, now I'm also confused :/ | 06:52 |
cr1901_modern | Well, at least I'm in good company | 06:53 |
mithro | rohitksingh / cr1901_modern: It seems like the output is using SDR? | 06:56 |
rohitksingh | mithro: still overall it looks like _florent_ implemented PHY from scratch instead of using S6 MIG hard-silicon? | 06:58 |
mithro | rohitksingh: Yes | 06:58 |
mithro | rohitksingh: Although S6 MIG hard silicon isn't really a huge amount of real hard silicon | 06:59 |
rohitksingh | mithro: Ok okay! That is wonderful! :0 | 07:00 |
rohitksingh | mithro: okay, didn't know that :/ | 07:00 |
mithro | Take a look at https://github.com/timvideos/HDMI2USB-jahanzeb-firmware/blob/master/ipcore_dir/ddr2ram/user_design/rtl/mcb_raw_wrapper.vhd | 07:03 |
tpb | Title: HDMI2USB-jahanzeb-firmware/mcb_raw_wrapper.vhd at master · timvideos/HDMI2USB-jahanzeb-firmware · GitHub (at github.com) | 07:03 |
mithro | The only really special thing is "IODRP2_MCB" usage... | 07:03 |
mithro | Which is described as | 07:04 |
mithro | Primitive: I/O Control Port for the Memory Controller Block | 07:04 |
mithro | The IODRP2_MCB is a component used by the Memory Interface Generator (MIG) core in conjunction with the MCB block to implement external memory interfaces. The use of this block outside of MIG is not supported. | 07:05 |
mithro | https://www.xilinx.com/support/documentation/sw_manuals/xilinx11/spartan6_hdl.pdf | 07:05 |
rohitksingh | mithro: Thanks! So MCB hard-silicon is just BULPLL_MCB + IODRP_MCB...lol :) Xilinx chose to provide no documentation on these | 07:15 |
_florent_ | cr1901_modern: we are using OSERDESE2 and not ODDR2, used as a 4:1 serializer. (you can see an ODDR2 as a 2:1 serializer) | 07:45 |
cr1901_modern | _florent_: I see, thanks | 08:16 |
cr1901_modern | mithro: Before I added tinyfpga support to either misoc or litex, I have to get this merged: https://github.com/m-labs/migen/pull/84 | 08:17 |
tpb | Title: Icestorm Backend Improvements by cr1901 · Pull Request #84 · m-labs/migen · GitHub (at github.com) | 08:17 |
cr1901_modern | s/added/add/ | 08:17 |
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tsukasa_au | jimmo: You around? | 23:16 |
tsukasa_au | I am trying to set up the HDMI2USB stuff on arch, and am hitting a compile error while building QEMU. Mithro suggests you may have hit and fixed the same issue | 23:17 |
tsukasa_au | Any idea? | 23:17 |
CarlFK | tsukasa_au: I probably can't help, but pastebin the error | 23:23 |
tsukasa_au | The error is http://paste.ubuntu.com/25890398/ | 23:25 |
tpb | Title: Ubuntu Pastebin (at paste.ubuntu.com) | 23:25 |
tsukasa_au | It looks like arch is enabling some warnings as errors (which fail on this older version of qemu) | 23:25 |
CarlFK | cc1: all warnings being treated as errors - yeah. any idea how to turn that off? | 23:31 |
mithro | Maybe "-Wno-werror" ? | 23:36 |
CarlFK[m] | how do I tell what res monitors I can hook up to a laptop? I was expecting xrandr --prop --verbose to do it, but nope: http://paste.ubuntu.com/25890461/ | 23:51 |
tpb | Title: Ubuntu Pastebin (at paste.ubuntu.com) | 23:51 |
CarlFK[m] | Thinkpad x1 yoga 2nd gen | 23:52 |
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