Sunday, 2017-08-27

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cr1901_modernJohn_K: Also mention that you'll lose the UART if you associate w/ libusb00:47
cr1901_modernmithro: Not that it's going to matter in a few days :P, but there seems to be a few versions of fxload. Which version are you currently using for mode-switch?01:00
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mithrocr1901_modern: the one that gets installed with "apt-get install fxload"03:24
John_KMithro: any luck?03:54
mithroJohn_K: sorry, only just starting to take a look now04:24
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mithroJohn_K: Afraid it doesn't quite work...04:49
mithroJohn_K: investigating now...04:49
mithrohttp://pastebin.ubuntu.com/25405371/04:49
tpbTitle: Ubuntu Pastebin (at pastebin.ubuntu.com)04:49
mithrohttps://www.irccloud.com/pastebin/jQO8q0b2/04:53
tpbTitle: Snippet | IRCCloud (at www.irccloud.com)04:53
mithroJohn_K: It also looks like you only support intelhex file format?04:55
paddatrappermithro: heading back to Cape Town now. Should be available in 1.5-2 hours05:09
mithropaddatrapper: okay cool05:09
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mithroJohn_K: http://pastebin.ubuntu.com/25405796/06:06
tpbTitle: Ubuntu Pastebin (at pastebin.ubuntu.com)06:06
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mithroJohn_K: It looks like there is an issue with parsing the segments?06:17
mithroJohn_K: I pushed some small fixes into your branch06:18
mithrowrite on-chip, addr 0x0100 len  128 (0x0080)06:20
mithrorohitksingh1: ping?06:20
mithroJohn_K: I would also like to move the changes into the hdmi2usb/modeswitch/libusb.py file06:24
mithrorohitksingh1: Do you know anything about https://numato.com/lm4550-ac97-stereo-audio-codec-expansion-module/ ?06:28
tpbTitle: LM4550 AC'97 Stereo Audio Codec Expansion Module (at numato.com)06:28
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mithroIshan_Bansal: ping?06:50
Ishan_Bansalmithro : pong06:51
mithroIshan_Bansal: I'm just reviewing paddatrapper's stuff now - I plan to look at your stuff after06:52
mithroIshan_Bansal: Where are we at with things?06:52
paddatrappermithro: been a massive accident and traffic is horrendous, so going to be probably another hour06:53
mithropaddatrapper: No worries06:53
Ishan_Bansalmithro : among the pull request we are on RLE-core, you made the comments twice and I have changed the RLE accordingly.06:53
mithroIshan_Bansal: Okay, I'll take another look at hopefully merge it06:53
Ishan_BansalAlso regarding the final report I also made the changes as per your comments on Google docs.06:54
mithroIshan_Bansal: Then you have more pull requests to send, right?06:54
Ishan_Bansalmithro : yup.06:54
mithroIshan_Bansal: Okay cool06:54
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mithroIshan_Bansal: ping?07:17
Ishan_Bansalmithro : pong07:17
mithroIshan_Bansal: Couple more tips when writing comments07:17
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mithroIshan_Bansal: You should never write something like "Under this module a matrix containing" or "Since the data we get" -- instead say "This module takes a matrix containing 64 blocks of XXXX and verifies the RLECore produces the same output as the reference data"07:20
mithroIshan_Bansal: If you find yourself writing words like "Under", "Since" and "Get" you are probably going down the right path07:22
mithros/right/wrong/07:22
mithroIshan_Bansal: If you find yourself writing words like "Under", "Since" and "Get" you are probably going down the *wrong* path07:22
mithroIshan_Bansal: As well, you should reply to each of my comments on your code saying if you have fixed the issue07:23
mithroIshan_Bansal: You have comments on your pull request now too - it's pretty close, mainly just some comment clean up07:25
Ishan_Bansalmithro : Ok, I will fix them.07:27
mithroIshan_Bansal: Oh, as well - generally I think you'll probably want "then"  (--> I went to the shops then went home.) not "than"(-->  I'd rather walk than drive there.)07:29
mithroEnglish is kind of stupid though07:29
John_KMithro: thanks for the fixes, I wasn't quite sure what was being done there07:30
John_KAnd yes, only intelhex support at the moment - I believe that is what was described in the issue07:30
mithroJohn_K: libusb.py and lsusb.py are suppose to provide the same API to the rest of the code07:30
John_KAh07:31
John_KAlso my bad, the issue doesn't mention intelhex07:31
John_KAs for the Invalid parameter, it seems the request may be too large07:31
mithroJohn_K: Yeah - it doesn't seem to be parsing the input file correctly07:32
John_KOh? I'm using the python intelhex module - it seems to do the right thing07:32
mithrofxload reads that segment as only 128 bytes long, but your code thinks its much larger07:33
John_KHrm, re-reading the pastebibs07:33
John_KPastebins07:33
mithroJohn_K -> http://pastebin.ubuntu.com/25405796/07:33
tpbTitle: Ubuntu Pastebin (at pastebin.ubuntu.com)07:33
mithroI think that is probably the most informative one07:34
John_KIt seems they both do 128 byte transfer just fine07:34
John_KBut the fxload code breaks the next fragment up into multiple USB transfers07:35
John_KI hadn't encountered a test file like this so far07:36
John_KCan you pastebin this hex file?07:36
John_KYeah from inspecting pyusb it looks like the control transfer is failing, strongly suspect due to transfer size07:38
mithroI'm pretty sure it's not the ezusb_write code?07:38
mithrohttps://github.com/wkoszek/fxload/blob/master/ezusb.c#L213-L23607:38
tpbTitle: fxload/ezusb.c at master · wkoszek/fxload · GitHub (at github.com)07:38
mithroJohn_K: I wonder if there is just a bug in the intel hex loading?07:41
mithroJohn_K: file I'm loading is here -> https://github.com/timvideos/HDMI2USB-mode-switch/blob/master/hdmi2usb/firmware/fx2/opsis/ixo-usb-jtag.hex07:41
tpbTitle: HDMI2USB-mode-switch/ixo-usb-jtag.hex at master · timvideos/HDMI2USB-mode-switch · GitHub (at github.com)07:41
John_KIt's entirely possible, checking ezusb.c to see how they handle fragmentation07:42
John_KThanks for linking that file07:42
mithroJohn_K: Does look like the error is occuring on the first multi-line segment07:43
mithroJohn_K: https://github.com/timvideos/HDMI2USB-mode-switch/blob/master/hdmi2usb/firmware/fx2/opsis/ixo-usb-jtag.hex#L17-L1807:44
tpbTitle: HDMI2USB-mode-switch/ixo-usb-jtag.hex at master · timvideos/HDMI2USB-mode-switch · GitHub (at github.com)07:44
John_KAh I think I see what's happening, the python intelhex module is reconstructing things in memory instead of processing the file line-by-line07:48
mithroActually07:48
John_KAnd there happens to be a large contiguous segment once it reconstructs things07:48
mithroI think I ran across this before...07:48
mithroJohn_K: Take a look at https://github.com/mithro/hexfile ?07:49
tpbTitle: GitHub - mithro/hexfile: Python library for parsing Intel Hex files. (at github.com)07:49
John_KI think I just need to break up the segments I get back from the intelhex module if they're too large for a single ctlrl transfer07:49
John_KSure07:49
John_KThis seems like it would have the same issue07:51
mithroJohn_K: Looks like you might be right -> https://github.com/timvideos/HDMI2USB-litex-firmware/blob/v0.0.2/firmware/fx2/generate_fx2_microboot.py#L204-L21507:53
tpbTitle: HDMI2USB-litex-firmware/generate_fx2_microboot.py at v0.0.2 · timvideos/HDMI2USB-litex-firmware · GitHub (at github.com)07:53
John_Khttps://GitHub.com/libusb/libusb/issues/11007:54
tpbTitle: Document upper limits on control transfers (INVALID_PARAMETER) (re: MAX_CTRL_BUFFER_LENGTH) · Issue #110 · libusb/libusb · GitHub (at GitHub.com)07:54
John_Ktl;dr: libusb internals support 4K max control transfer buffer07:55
John_KPatch should be easy07:55
mithroIshan_Bansal: you seem to have removed my access to put comments on your gsoc file report...08:12
mithros/file/final/08:12
John_KMithro: try re-pulling CypressFX08:13
mithrohttps://www.irccloud.com/pastebin/mUEL3Rgz/08:15
tpbTitle: Snippet | IRCCloud (at www.irccloud.com)08:15
John_KWell that's embarrassing, flubbed the commit08:17
John_KFixed, retry please08:19
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John_KIt appears to succeed in uploading ixo-USB-JTAG.hex to my test FX2 device08:22
mithroJohn_K: the device re enumerates as the ixo-usb-jtag device?08:22
John_KIt does not appear to, no08:23
Ishan_Bansalmithro : https://docs.google.com/document/d/1hXhApH3lDt4gT7ULloFavc0kUgBTPp0yphXEUjW9RKo/edit?usp=sharing08:24
tpbTitle: GSOC Final Project Report - Google Docs (at docs.google.com)08:24
mithroJohn_K: It should?08:26
Ishan_Bansalmithro : going to lunch, come within half an hour.08:27
mithroJohn_K: Doesn't seem to work here either...08:27
John_KJust verifying functionality on windows with fxload.exe now08:28
John_KOk that works as you described, I'll Debug here and ping you once I have the device reenumerating properly08:29
John_KLikely will happen in about 16 hours, its late here08:30
mithroJohn_K: No worries08:31
mithroJohn_K: fxload.exe with --verbose might be useful to figure out what is going on....08:31
John_KSo now it seems to work08:34
John_KOh hah08:34
John_KFxload.py will work because it reboots the device for you but the API doesn't08:35
paddatrappermithro: just waiting for travis to build the fixes on that PR08:36
John_KActually that's a lie, it IS in the API08:36
mithropaddatrapper: You coding in a car, or made it home?08:36
paddatrappermithro: just got home. I did some work in the car, then my battery died08:36
mithropaddatrapper: Okay cool08:42
mithropaddatrapper: I haven't made much progress on the audio side of things been reviewing code and John_K has been distracting me :-P08:43
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paddatrappermithro: no worries. I see version_data is causing issues with my PR and travis...08:55
paddatrappermithro: I doubt I'll be able to get the loopback working in time for Tuesday. I'm going to keep working on it, but it feels like it needs a lot more work than there is time before submission09:14
mithropaddatrapper: Okay09:14
mithropaddatrapper: Were are things at the moment?09:14
paddatrappermithro: master isn't populating FIFO buffer correctly, so it is writing the same 512 bytes all the time. Slave isn't reading them09:15
mithropaddatrapper: Do you want to have a look at it in a little bit?09:16
paddatrappermithro: sure, though I think we probably want to try get the PR merged first as I'm already dreading the merge conflicts :)09:16
mithropaddatrapper: Sure09:17
paddatrappermithro: I don't have the git-foo to know what on earth travis is complaining about when it fails to generate the version_data stuff09:23
mithropaddatrapper: Don't worry about it - I'll figure it out09:23
paddatrappermithro: thanks09:23
mithropaddatrapper: This AC97 codec looks pretty simple - I should have firmware working for it in an hour or two09:25
paddatrappermithro: awesome09:26
mithroBut first I'm going to go find some dinner09:26
mithropaddatrapper: Be back in about 30 minutes09:27
paddatrappermithro: ok cool09:27
mithropaddatrapper: Back now, but eating dinner10:11
paddatrappermithro: no stresss10:11
mithroshould I be looking at a pull request again now?10:14
paddatrappermithro: Yup, it's ready for you10:15
paddatrapperalso opened one for fixing serial docs10:15
mithropaddatrapper: just merged that one10:18
mithropaddatrapper: I think you missed some of my comments - just a few small things and we can merge it10:27
paddatrappermithro: which ones (aside from those you've commented on in the last 5 minutes)?10:29
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mithropaddatrapper: you might need to open the "outdated" bits...10:30
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paddatrappermithro: I've fixed those outdated bits10:34
mithropaddatrapper: Can you make sure you have replied fixed to everything?10:34
paddatrappermithro: sure will do10:35
paddatrappermithro: think I've replied to them all10:36
mithromaybe I was looking at an old version...10:37
mithropaddatrapper: You missed the bMaxPower in the .fullspeed10:37
paddatrappermithro: fixed10:39
mithropaddatrapper: BTW what is UAC_FORMAT_TYPE_I_PCM ?10:40
paddatrappermithro: PCM formatted audio10:40
mithropaddatrapper: Oh - It means "UAC Format: Type I (PCM)" ?10:41
paddatrappermithro: yup (UAC = USB Audio Control)10:41
mithropaddatrapper: So the AC97 seems to use 18bit/20bit samples at 48kHz10:42
paddatrappermithro: ok. Need to change the frequency in the descriptors too10:44
mithropaddatrapper: Yeah but lets get this merge first10:44
paddatrapper+110:45
paddatrappermithro: seems travis only works if it is building a single commit's difference10:46
paddatrapperso if I make 3 commits then push, it will fail10:46
mithro16, 18, or 20-bit PCM data for Left and Right channels10:47
paddatrapper18 bit should probably be good enough, CD is 16 and studio is usually 20+10:52
mithroPutting the codec into anything other than 18bit is going to take a little longer then an hour or two10:54
paddatrapperthen 18 is good :)10:55
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paddatrappermi11:19
paddatrappermithro: also I've replied to two of your comments on my final report just seeking clarity on what you mean11:20
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mithropaddatrapper: Happy for me to merge?11:25
paddatrappermithro: yup11:26
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mithropaddatrapper: So what is next?11:55
paddatrappermithro: the loopback device or the Travis stuff12:00
mithroI can dig into the travis stuff tomorrow12:01
paddatrapperI've opened a PR for the loopback just so that we can be on the same page12:01
paddatrapperOk cool. I'm just grabbing lunch. Will be back in 30 minutes12:02
mithropaddatrapper: Okay, can you tell me how to wire them together?12:03
paddatrappermithro: https://docs.google.com/document/d/16eDShtKzo70vBi_XYxIYivrKqvq-xRCOFcRqp2E75Yc/edit?usp=drivesdk12:04
tpbTitle: GSoC Project Report - Google Docs (at docs.google.com)12:04
paddatrapperNot that one...12:05
paddatrappermithro: https://docs.google.com/document/d/16eDShtKzo70vBi_XYxIYivrKqvq-xRCOFcRqp2E75Yc/edit?usp=drivesdk12:05
tpbTitle: GSoC Project Report - Google Docs (at docs.google.com)12:05
paddatrapperNo...12:05
paddatrappermithro: https://docs.google.com/document/d/1EorbduvRUTyo7F9cKXOaUv8S_PKbAmPScTQEOOjun0I/edit?usp=drivesdk12:05
tpbTitle: FX2 FIFO Interface - Google Docs (at docs.google.com)12:05
paddatrapperThis one...12:05
mithropaddatrapper: Great, I'll go find some wires12:08
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paddatrappermithro: I'm back12:49
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mithropaddatrapper: Well, it seems I don't have enough wires here12:59
paddatrappermithro: You can use only FD[0:7] and I'll reduce the data bus width13:00
mithroI managed to find 6, seems someone has raided the makerspace supplies...13:00
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paddatrapperhmm... yeah that is a tad short13:02
paddatrappermithro: perhaps just use the single board and serial to look at EP8FIFOBUF for the moment? Need to try figure out why reading from the FIFO isn't clearing it13:04
paddatrappermithro: added build instructions to the directory13:05
mithropaddatrapper: So, are you writing manually or using the FIFO?13:12
paddatrappermithro: the FIFO fills automatically from the endpoint, I then manually read from the FIFO and activate the pins in port B (FD)13:13
paddatrappermithro: moved everything to 8-bit wide so that serial can be on the same pin as the video firmware and the example13:16
mithropaddatrapper: So when doing the copying out of the buffers to the output pins manually, you want to make sure you disable the Auto-In / Auto-Out modes13:32
paddatrappermithro: but then data are not copied into the FIFO13:33
paddatrappers/are/is13:33
mithroThe EZ-USB’s CPU is not in the host-to-master data path when AUTOOUT = 1. To achieve the maximum bandwidth, the host and master are directly connected, bypassing the CPU.13:33
paddatrappermithro: so then I need to do the reading into the FIFO too?13:37
mithropaddatrapper: So, lines 117->122 are suppose to read the data from the buffer and write them to the FDL/FDH output, right?13:39
paddatrappermithro: yup13:39
mithropaddatrapper: So what you are doing doesn't involve the FIFO stuff at all13:42
mithropaddatrapper: You want to follow the "Access to endpoint buffers" on page 8713:42
paddatrappermithro: Well I read from it13:42
mithropaddatrapper: So the docs are actually annoyingly confusing here13:44
mithroWhat is really happening is the following13:45
mithroPC -> FX2 Buffer RAM13:45
mithroThen there is a FIFO which can do    FX2 Buffer RAM <-> IO Pins  automatically13:46
paddatrapperah ok13:47
paddatrapperthat is not at all how it came across in the docs...13:47
mithro"When outside logic is connected to the interface FIFOs, the normal data flow is for the EZ-USB to commit OUT data packets to the outside interface FIFO as they become available."13:48
mithroIn some cases, it may be desirable to insert a ‘hook’ into this data flow, so that – rather than the EZ-USB automatically committing the packets to the outside interface as they are received over USB – firmware receives an interrupt for every received OUT packet, then has the option either to commit the packet to the outside interface (the output FIFO), or to13:48
mithrodiscard it. The firmware might, for example, inspect a packet header to make this skip/commit decision.13:48
paddatrapperHow it came across to me was PC -> FX2 Buffer RAM -> FIFO Buffer -> FD pins13:50
mithropaddatrapper: So it kind of works like a frame buffer13:51
paddatrappermithro: ok. So how do you suggest I do the sending from PC?13:52
mithropaddatrapper: In double buffering mode, the PC writes into one buffer region13:52
mithroThe buffer is then handed to either the CPU or the FIFO and the PC starts writing into the other buffer13:52
mithros/buffer/buffer address/13:53
paddatrapperah ok13:53
mithropaddatrapper: So if you are trying to manually copy the data out of the buffer onto the pins, you need to tell the FX2 to skip the packet13:57
paddatrappermithro: skip discards the packet thoug,  is that what we want?13:58
mithropaddatrapper: If you just looped over the the whole packet and wrote it manually to the data pins13:59
mithropaddatrapper: Otherwise the packet will be used by the FIFO and you'll get every packet twice...13:59
paddatrappermithro: well currently the same packet is sent infinitely14:00
mithropaddatrapper: So in manual mode you want to make sure the pins are in "ports" mode14:01
paddatrappermithro: yup, done that. I've veified that they are triggered when I write to them14:02
mithroYou want ENH_PKT set to "1"14:03
paddatrappermithro: yup, got that14:04
mithropaddatrapper: AUTOOUT should be 014:05
paddatrapperyup, doing that now14:05
mithropaddatrapper: Then after writing out the contents of the packet, set SKIP14:07
paddatrappercool14:08
mithropaddatrapper: You also going to want to bit-bank the clock yourself, rather than using the IFCLK14:09
mithropaddatrapper: That will also let you slow down the rate at which you are clocking the data out, so you can use the other FX2 in logic mode14:10
paddatrappermithro: ok... how do I do that reliably?14:10
paddatrapperah yes14:10
mithropaddatrapper: Choose a pin to be the clock14:10
mithropaddatrapper: pull it low, write your data, pull it high, sleep for a bit, pull it low, write your data, pull it high, sleep for a bit, .....14:11
paddatrapperbut I will only be toggling it during the transfer, between them them it will be constant14:11
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mithropaddatrapper: That should be fine I think?14:16
paddatrappermithro: ok. I shall give it a try14:17
mithropaddatrapper: I need to head home to bed14:22
paddatrappermithro: ok no problem. Thanks for your help!14:23
mithropaddatrapper: But yeah, slow the data output down a lot14:24
mithropaddatrapper: And see if you can figure out what is going on14:24
paddatrappermithro: I'm running it at a quater of the speed14:24
mithropaddatrapper: It's worse than that because the CPU takes X cycles per instruction14:25
paddatrappermithro: ok it's under a quater of the speed14:26
mithropaddatrapper: Yeah - the FIFO mode which avoids the CPU is much faster as it can transfer 16 bits of data per clock cycle....14:28
mithropaddatrapper: Feel free to submit your stuff14:30
mithropaddatrapper: I'm sure we'll get it working eventually even if its after GSoC officially ends14:30
paddatrappermithro: thanks. Will try find a way of speeding that video up and will do14:31
paddatrappermithro: I certainly want to get it working! It's annoying me now :)14:31
mithropaddatrapper: I'll help you figure out the fast way later too :-)14:31
paddatrappermithro: awesome, long run that is probably the way to go14:32
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mithropaddatrapper: any luck?22:52

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