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| tumbleweed | mithro: I submitted some monitors to edit.tv, but it doesn't seem to be parsing some correctly | 19:12 |
|---|---|---|
| tumbleweed | http://edid.tv/edid/136/ (and 135) are 2560x1440 panels, but only displaying as 1920x1200@60Hz | 19:13 |
| tpb | Title: Details - EDID.tv (at edid.tv) | 19:13 |
| mithro | It probably needs some love | 19:14 |
| tumbleweed | also, the xrandr paste mode doesn't work | 19:14 |
| tumbleweed | but hex does, given a hex section extracted from xrandr output | 19:14 |
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| cr1901_modern | mithro: So I stripped mimasv2 to the bare minimum, using the simple.py target in MiSoC (sic). Even that target has a broken UART | 19:52 |
| cr1901_modern | but the firmware does run without crashing, so there's that. | 19:53 |
| mithro | cr1901_modern: Are you sure you are using the uart at the right baud rate? | 19:53 |
| cr1901_modern | mithro: Yes, I manually patched simple.py to use 19200 | 19:53 |
| cr1901_modern | UART tends to skip a number of characters | 19:53 |
| mithro | I'm 100% sure I had the LiteX SDRAMSoC running with the BIOS booting from block ram | 19:54 |
| cr1901_modern | Well, even that crashed for me :( | 19:54 |
| cr1901_modern | So the next step is to keep adding components until it breaks. The reverse of Muntzing. I don't think simulation is going to help here, but I've also batted around adding a JTAG bridge | 19:55 |
| cr1901_modern | Or just manually connecting via OpenOCD | 19:55 |
| mithro | https://github.com/mithro/HDMI2USB-litex-firmware/blob/f33e2bd88b12d2e804aef3680442f511ca6a9c29/targets/mimasv2/base.py | 19:56 |
| tpb | Title: HDMI2USB-litex-firmware/base.py at f33e2bd88b12d2e804aef3680442f511ca6a9c29 · mithro/HDMI2USB-litex-firmware · GitHub (at github.com) | 19:56 |
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| cr1901_modern | mithro: Trying now | 20:06 |
| cr1901_modern | erm, compiling now | 20:06 |
| cr1901_modern | Okay, something very interesting just happened w/ compile times | 20:20 |
| cr1901_modern | since checking out that file, and that file alone, compile times went to 700s instead of 400s | 20:20 |
| cr1901_modern | mithro: I can confirm w/ that image that the device no longer crashes, but the UART is still completely screwed up | 20:27 |
| cr1901_modern | I stashed "my" copy of the gateware that didn't work/crashed, so I can do a diff to see what's different. But first I need to figure out what the hell's up with the COM port... | 20:28 |
| mithro | cr1901_modern: How are you connecting with flterm? | 20:28 |
| mithro | cr1901_modern: are you specifying the baud rate to flterm correctly? | 20:29 |
| cr1901_modern | mithro: I'm using PuTTY :P | 20:29 |
| mithro | cr1901_modern: Have you turned off flow control? | 20:29 |
| cr1901_modern | flow control is off | 20:32 |
| cr1901_modern | no change | 20:32 |
| cr1901_modern | Every few characters is skipped | 20:32 |
| cr1901_modern | (now it can't be the uart b/c the FPGA wouldn't have booted if it failed) | 20:33 |
| cr1901_modern | _florent_: What Putty options do you use? Or does flterm work on Windows? | 20:34 |
| mithro | cr1901_modern: can you try flterm? | 20:35 |
| cr1901_modern | mithro: Tried it, same problem | 21:03 |
| cr1901_modern | (additionally, flterm appears to like to poll without sleeping, so it will max out a core) | 21:03 |
| cr1901_modern | mithro: Now what I *CAN* do is replace with a dummy UART that just spits stuff to the screen | 21:04 |
| cr1901_modern | and check to see if there's the same problem. If so, I wonder if the PIC doing the UART is broken | 21:04 |
| mithro | Well, getting on a ~20ish hours of flights now | 21:04 |
| mithro | Be back in a day or two | 21:05 |
| cr1901_modern | mithro: I'll be hacking away and seeing what I can do :) | 21:05 |
| cr1901_modern | Try to get some rest | 21:05 |
| mithro | That version probably still has the CPU running at 85MHz | 21:32 |
| cr1901_modern | mithro: It does. That shouldn't have changed anything | 21:53 |
| cr1901_modern | unless you dialed down the clk freq when testing | 21:53 |
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