Tuesday, 2016-09-20

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mithrohttps://docs.google.com/drawings/d/1pzHJHXdK3i8jXyajnJr600iyQJxbygrYz6OKwOTBKbw/edit04:01
tpbTitle: Roadie Case Construction - Google Drawings (at docs.google.com)04:01
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mithro_florent_: low priority ping07:13
_florent_mithro: hi07:18
mithroI started looking at opsis-soc07:19
mithro_florent_: I assume you saw all the issues I logged on the repo? :-P07:22
_florent_mithro: yes I saw it07:22
_florent_but haven't find time to really look at it07:23
mithro_florent_: The current "opsis_hdmi2usb" target seems to only take 5 minutes to generate - I'm wondering if the encoder is actually being included with that speed?07:24
_florent_mithro: I'll do that soon07:24
_florent_mithro: let me check that...07:24
mithro_florent_: The couple of issues I could use your comments on are07:25
mithrohttps://github.com/enjoy-digital/opsis-soc/issues/707:25
tpbTitle: Figure out `firmware/uip` · Issue #7 · enjoy-digital/opsis-soc · GitHub (at github.com)07:25
mithrohttps://github.com/enjoy-digital/opsis-soc/issues/1307:25
tpbTitle: Figure out how to use tftp to load firmware via ethernet · Issue #13 · enjoy-digital/opsis-soc · GitHub (at github.com)07:25
_florent_mithro: I think using SDRAM to store the firmware greatly reduced the number of block ram used and then the time to generate the bitstream07:26
_florent_ok I'll look right now at these 2 issues07:26
mithro_florent_: If that is the case, this is pretty awesome07:26
mithro_florent_: I could figure them out myself, but I'm sure if you drop a couple of small comments on them it will be much quicker for me07:27
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mithro_florent_: My first task to move forward is to fix this -> https://github.com/enjoy-digital/opsis-soc/issues/3 - I assume you are using an external UART because you haven't found the TOFE UART reliable and are not using the FX2 either?07:39
tpbTitle: Connect UART to multiple locations · Issue #3 · enjoy-digital/opsis-soc · GitHub (at github.com)07:39
_florent_mithro: indeed, the TOFE UART is not really reliable here07:40
_florent_when I get it working, I'm able to use it07:41
_florent_but from time to time, it seems to have initialization problem07:41
_florent_and I need to plug/unplug the usb cable multiple time to get the UART working07:41
_florent_so when you are already debugging something else this is a bit painful07:42
mithro_florent_: Can you log a bug somewhere with info so I can try and repo it?07:42
_florent_ok I'll do that07:43
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mithro_florent_: What are you using for a UART? A PMOD to USB UART thingy like this -> http://store.digilentinc.com/pmodusbuart-usb-to-uart-interface/ ?08:17
tpbTitle: PmodUSBUART: USB to UART Interface - Digilent (at store.digilentinc.com)08:17
mithro_florent_: Or have you just shoved another device into the holes? :P08:17
_florent_mithro: It's not a PMOD, just a USB to UART module connected to the PMOD connector08:26
mithro_florent_: What tftp server do you use? Your on Windows mainly right?08:29
mithroshenki: What tftp server do you recommend?08:30
shenkimithro: trying to work out what i have installed09:16
shenkimithro: whatever 'apt-get install tftpd' installs09:16
shenkiand then something like this in /etc/xinetd.d/tftp:09:17
shenkiservice tftp09:17
shenki{09:17
shenki        protocol        = udp09:17
shenki        port            = 6909:17
shenki        socket_type     = dgram09:17
shenki        wait            = yes09:17
shenki        user            = nobody09:17
shenki        server          = /usr/sbin/in.tftpd09:17
shenki        server_args     = /srv/tftp09:17
shenki        disable         = no09:17
shenki}09:17
mithro_florent_: Is liteEth statically configured for a given IP address? Or does it use DHCP?09:27
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mithro_florent_: Looks like I have the tftp stuff booting on the opsis_sim target11:45
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mithroProbably not going to get to a real system tonight12:03
_florent_mithro: sorry I was not there, I'm back if needed12:04
mithro_florent_: Nothing needed at the moment, just giving you an update12:05
_florent_ok12:05
mithro_florent_: Oh, what speed do you get the simulation to run at?12:06
_florent_I don't remember exactly, something between 300Khz and 1Mhz12:06
mithroI'm getting around "average speed: 0.174 MHz"12:07
mithroAnd what is the telnet port suppose to do? :-P12:07
_florent_you should be able to get same console than with UART12:11
mithro_florent_: I think I've broken it then - typing anything on the telnet interface seems to cause newlines to appear on the uart console but nothing gets back12:12
mithroI'll see if I can get it working without my changes a bit later12:13
cr1901_modern_florent_: Did you get my previous message?12:13
_florent_mithro: ok, not sure I tested it recently12:21
mithro_florent_: Well, if I get the same behaviour without my changes I know it wasn't me :-)12:21
_florent_cr1901_modern: sorry, what was the question?12:23
cr1901_modern_florent_: https://logs.timvideos.us/%23timvideos/%23timvideos.2016-09-15.log.html#t2016-09-15T22:17:1512:39
cr1901_modern_florent_: The idea is to free up all the PLLs for HDMI in and out. HDMI out could possibly get away with a DCM. HDMI in- there's absolutely no way around using a PLL if receiving data reliably is a requirement :)12:40
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_florent_cr1901_modern: I don't know if it can work, have you tried it?12:54
_florent_cr1901_modern: it's for the minispartan6 that you need that right?12:54
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mithro_florent_: It would be nice to have some free PLLs on all the boards :)13:07
mithrowell home + bed time for me13:19
mithrognight!13:19
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cr1901_modern_florent_: Yes, it's for the minispartan that I need it.13:38
cr1901_modern_florent_: I was just wondering if I could extend it beyond minispartan13:38
_florent_cr1901_modern: you tested it successfully on the minispartan6?13:39
cr1901_modern_florent_: Yes. The board boots. But since I haven't ported minispartan to LiteX yet the firmware crashes pretty soon after13:40
cr1901_modern_florent_: The thing with minispartan is that it only uses two of the PLL outputs. Same frequency, different phase. I use one DCM to generate the 2.5x freq, and another to generate 270 degrees out of phase13:41
cr1901_modern_florent_: The opsis on the other hand, uses all of the PLL's outputs, and I'm unsure of the best way to connect the clock network together13:42
cr1901_modernThe opsis' clock network is much more complicated (and Idk why- I haven't been working on that board)13:43
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cr1901_modern2What the hell is going on with my connection?!13:48
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_florent_cr1901_modern: the clock network is more complicated on the opsis since it uses DDR3 and need more clocks for that13:50
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cr1901_modern_florent_: I see. I wonder if Xilinx has an APNOTE for using DCMs with DDR3...13:52
_florent_cr1901_modern: I don't know, but it's already a bit difficult to get things working with PLL, so I'm probably not going to try to get it working with DCM my self :)13:53
cr1901_modern_florent_: It was just a thought, is all. If/when I get an Opsis, I'd be willing to take a stab myself13:54
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