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| mithro | hey ssk1328 | 04:45 |
|---|---|---|
| ssk1328 | mithro: Hi | 04:45 |
| ssk1328 | mithro: The earlier problem was solved | 04:46 |
| ssk1328 | mithro: Now I can't seem to figure out why, but the another DMA block is not working correctly | 04:46 |
| mithro | ssk1328: Describe "not working correctly" | 04:47 |
| ssk1328 | mithro: Okay, basically whatever I set for hdmi_out0_fi_base1_write(), it doesn't reflect in output | 04:48 |
| ssk1328 | Only hdmi_out0_fi_base0_write() thing reflects on the output | 04:48 |
| mithro | ssk1328: That is still not very descriptive | 04:50 |
| ssk1328 | hdmi_out0_fi_base1_write() being the function used to set base address for second DMA port | 04:50 |
| mithro | ssk1328: What do you expect to happen, and what is actually happening? | 04:50 |
| ssk1328 | mithro: So I am mixing the outputs from DMA0 and DMA1, and the corresponding functions I stated before set the base address for these DMA ports | 04:51 |
| mithro | ssk1328: Yes, that is the theory | 04:51 |
| ssk1328 | mithro: As per the what output I see, I sense that, both the mixer block are getting same input from DMA0 | 04:52 |
| ssk1328 | mithro: And changing base address for DMA1 doesn't affect anything | 04:53 |
| mithro | ssk1328: Have you looked at what the hdmi_out0_fi_base1_write() function is doing? | 04:53 |
| ssk1328 | mithro: So we are using hdmi_out0_fi_base0_write(), to set the base address from where DMA0 will read the contents | 04:55 |
| mithro | ssk1328: So what you are saying is "I call the hdmi_out0_fi_base1_write function with a value and I don't see any changes in the output" | 04:55 |
| ssk1328 | mithro: So for the other port address is set using hdmi_out0_fi_base1_write() | 04:55 |
| ssk1328 | mithro: Yes | 04:55 |
| mithro | ssk1328: That isn't a lot of information so far. Does the hdmi_out0_fi_base0_write() function do anything? | 04:56 |
| ssk1328 | mithro: Its a function in csr.h, it stores the data in some CSR registers | 04:57 |
| mithro | ssk1328: I know what it does - but doing a quick compare of that the working hdmi_out0_fi_base0_write and the nonworking hdmi_out0_fi_base1_write is a good idea | 04:58 |
| ssk1328 | mithro: In the csr.h, only thing to compare, is they store the corresponding value in different memory locations in memory | 04:59 |
| ssk1328 | mithro: What exactly do you mean by compare | 04:59 |
| mithro | ssk1328: Look at the generated C code | 05:00 |
| mithro | brb | 05:00 |
| ssk1328 | mithro: Yeah, they just store the value passed at different locations, thats it | 05:00 |
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| mithro | ssk1328: confirming that they are writing to different locations is a good thing to do | 05:13 |
| mithro | ssk1328: Next step would be confirming that the value is getting to your hardware | 05:14 |
| mithro | ssk1328: I also find the code organisation in https://github.com/ssk1328/HDMI2USB-misoc-firmware/blob/float-arithmetic/gateware/hdmi_out/__init__.py a bit confusing | 05:15 |
| tpb | Title: HDMI2USB-misoc-firmware/__init__.py at float-arithmetic · ssk1328/HDMI2USB-misoc-firmware · GitHub (at github.com) | 05:15 |
| ssk1328 | mithro: I think this is because of self.sdram.crossbar.get_master() function? | 05:16 |
| ssk1328 | mithro: Do you know exact working of this | 05:16 |
| ssk1328 | mithro: I think i need to call it two times, which I am not doign right now | 05:17 |
| mithro | ssk1328: That could be the case - get_master does seem to create something -> https://github.com/timvideos/misoc/blob/legacy/misoclib/mem/sdram/core/lasmixbar.py#L35 | 05:34 |
| tpb | Title: misoc/lasmixbar.py at legacy · timvideos/misoc · GitHub (at github.com) | 05:34 |
| mithro | ssk1328: You should try and draw the dataflow graph of G too | 05:34 |
| ssk1328 | mithro: I was at the exact same line right, now, I guess I need to call it two times | 05:35 |
| ssk1328 | mithro: It has an append function as well | 05:35 |
| mithro | ssk1328: possibly | 05:35 |
| mithro | ssk1328: btw I'll be around on the weekend and the start of next week for testing | 05:36 |
| ssk1328 | mithro: So I am gonna try doing that right now | 05:36 |
| mithro | ssk1328: great | 05:36 |
| mithro | I'll be in and out for the next couple of hours - have to get ready for a flight to Melbourne | 05:36 |
| ssk1328 | mithro: Okay | 05:36 |
| ssk1328 | mithro: As always I will ping here if I run into problems | 05:37 |
| mithro | ssk1328: It can be helpful to just talk into the channel even if nobody responds | 05:38 |
| ssk1328 | mithro: Yes | 05:39 |
| mithro | ssk1328: Do you know about the idea of "rubber duck debugging"? | 05:39 |
| mithro | ssk1328: https://en.wikipedia.org/wiki/Rubber_duck_debugging | 05:39 |
| tpb | Title: Rubber duck debugging - Wikipedia, the free encyclopedia (at en.wikipedia.org) | 05:39 |
| ssk1328 | mithro: Sounds interesting | 05:39 |
| mithro | bblr | 05:44 |
| mithro | ssk1328: It is in some ways another way of saying "You don't understand something until you can explain it in simple language to someone else" | 05:44 |
| ssk1328 | mithro: Yeah, most of the problems, I figured in something similar to this way! | 05:46 |
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| mithro | ssk1328: any luck? | 07:33 |
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| ssk1328 | mithro: Not working right now | 08:27 |
| ssk1328 | mithro: In status at HDMI2USB propmt I see ddr : read 0Mbps | 08:28 |
| mithro | Does that normally work when using the video target? | 08:29 |
| ssk1328 | Yeah, they don't work the moment I add another instatntiation of self.sdram.crossbar.get_master() | 08:30 |
| ssk1328 | Otherwise it works | 08:31 |
| mithro | What do you mean? The bandwidth measurement doesn't work when you update your code for the extra master? | 08:31 |
| mithro | I'm about 5-10 minutes away from getting on a plane | 08:32 |
| ssk1328 | mithro: When I connect the extra master in my block, the output itself doesn't work, and also ddr read is 0Mbps | 08:32 |
| ssk1328 | mithro: I have been diving into dma codes as well | 08:33 |
| ssk1328 | mithro: Can't seem to pinpoint the problem | 08:33 |
| mithro | I can't look at the code now, but how are you combining the outputs of the two dma engines? | 08:33 |
| mithro | IE that needs some type of synchronisation right? | 08:34 |
| ssk1328 | mithro: Combinig I do later in my usual mixer , block, spcifcally using the floatadd | 08:34 |
| mithro | You combined the pixels into a two pixel record, right? | 08:35 |
| mithro | Which you then pass to the next block! | 08:35 |
| mithro | ? | 08:35 |
| mithro | Typing on the phone is hard :-P | 08:36 |
| ssk1328 | mithro: I changed layout at some places, yes | 08:36 |
| mithro | Look at how that bit works | 08:37 |
| ssk1328 | mithro: The VTG has two Sinks instead of one now, each of which comes from a Cast think | 08:37 |
| ssk1328 | 8THING | 08:37 |
| ssk1328 | *thing | 08:38 |
| mithro | The output of those two sinks are combined into a single record which is then sent out a source, right? | 08:39 |
| ssk1328 | mithro: No | 08:40 |
| ssk1328 | mithro: The two sinks are separate | 08:40 |
| mithro | That isn't going to work then | 08:41 |
| ssk1328 | mithro: Okay, understood, I will focus on this part then | 08:41 |
| mithro | You need to take the output from the two sinks, join it together and pass it onto the next stage | 08:41 |
| ssk1328 | I guess the cast thing should combine both the streams in single layout | 08:41 |
| mithro | Yeah, it might have some magic which does that type of thing already | 08:42 |
| mithro | But I don't know | 08:42 |
| ssk1328 | cast is a simple combination thing which just rearranges the connection | 08:43 |
| ssk1328 | mithro: I am gonna resolve this | 08:43 |
| mithro | Boarding the plane now | 08:43 |
| ssk1328 | mithro: This also explains this was working with single lasmi block | 08:43 |
| ssk1328 | mithro: Okay | 08:43 |
| ssk1328 | I will get back to you later | 08:43 |
| mithro | Yeah, a single lamsi block is automatically synced with itself :-) | 08:44 |
| ssk1328 | mithro: Yeah, seems logical | 08:44 |
| ssk1328 | mithro: Anyways happy journey to you! :) | 08:44 |
| mithro | See ya! | 08:45 |
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| rohitksingh | sab_123: ready? | 11:37 |
| sab_123 | yes | 11:37 |
| rohitksingh | great | 11:37 |
| rohitksingh | you have the link right? | 11:38 |
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