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| shenki | mithro: http://j-core.org/ | 09:05 |
|---|---|---|
| tpb | Title: J-core Open Processor (at j-core.org) | 09:05 |
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| mithro | shenki: yeah, I'd seen that before - it is not a very efficient design it seems, also lackes a MMU | 09:39 |
| mithro | LX9 FPGA that can run a J2 at 50mhz | 09:40 |
| mithro | A single instance of the processor with the cache disabled takes up about 60% of an LX9's capacity. | 09:41 |
| shenki | heh ok | 09:41 |
| shenki | i guess it's a asic design, not something that's made as a soft core | 09:41 |
| mithro | yeah | 09:46 |
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| mithro | shenki: Doing some hacking? | 10:46 |
| shenki | mithro: im trying to install windows, so i can download the update file for a sony android device | 10:50 |
| shenki | it's the worst | 10:50 |
| mithro | shenki: why not just give up and do some HDMI2USB hacking :P | 10:50 |
| shenki | mithro: hah | 10:53 |
| shenki | mithro: what should i hack on? | 10:53 |
| mithro | shenki: see if you can reproduce my or1k branch | 10:55 |
| mithro | shenki: or getting the or1k linux kernel building | 10:56 |
| mithro | shenki: or getting that UART code upstream :P | 10:56 |
| shenki | uart code is the worst. i'll look at or1k | 11:01 |
| mithro | https://github.com/openrisc/tutorials | 11:03 |
| tpb | Title: GitHub - openrisc/tutorials: OpenRISC Tutorials (at github.com) | 11:03 |
| mithro | shenki: http://openrisc.io/ | 11:04 |
| tpb | Title: OpenRISC - OpenRISC (at openrisc.io) | 11:04 |
| mithro | shenki: http://openrisc.io/newlib/building.html | 11:05 |
| tpb | Title: or1k-elf toolchain (newlib port for OpenRISC) (at openrisc.io) | 11:05 |
| mithro | shenki: https://www.kernel.org/doc/readme/arch-openrisc-README.openrisc | 11:06 |
| mithro | shenki: maybe https://github.com/openrisc/tutorials/blob/master/docs/Linux.md too? | 11:07 |
| tpb | Title: tutorials/Linux.md at master · openrisc/tutorials · GitHub (at github.com) | 11:07 |
| mithro | the guys in #openrisc are pretty responsive | 11:07 |
| shenki | cool | 11:08 |
| mithro | shenki: I have the binutils and gcc in our conda package | 11:12 |
| mithro | shenki: My branch which adds or1k to HDMI2USB firmware can be found at https://github.com/mithro/HDMI2USB-misoc-firmware/tree/or1k | 11:12 |
| tpb | Title: GitHub - mithro/HDMI2USB-misoc-firmware at or1k (at github.com) | 11:12 |
| shenki | ok | 11:26 |
| shenki | mithro: are we going with musl or uclibc? | 11:35 |
| mithro | shenki: I'm build a "bare metal" toolchain with newlib | 11:35 |
| shenki | mithro: yeah. according to openrisc.io we want to pick one of the other two for linux | 11:38 |
| mithro | shenki: for user space :) | 11:38 |
| shenki | luserspace | 11:38 |
| mithro | shenki: Get the kernel booting first :P | 11:38 |
| shenki | yeah | 11:38 |
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| shenki | mithro: how do i build your hdmi2usb branch? | 11:54 |
| mithro | shenki: same way as normal | 11:54 |
| mithro | shenki: export you add ARCH=or1k | 11:54 |
| shenki | mithro: can i just boot a prebuilt one? or do i need to build | 11:54 |
| mithro | shenki: probably want to build | 11:54 |
| shenki | k | 11:55 |
| shenki | mithro: we need a quickstart for when developers forget how to make it go | 11:55 |
| mithro | https://github.com/mithro/HDMI2USB-misoc-firmware/blob/or1k/scripts/README.md#building-the-firmware | 11:55 |
| tpb | Title: HDMI2USB-misoc-firmware/README.md at or1k · mithro/HDMI2USB-misoc-firmware · GitHub (at github.com) | 11:55 |
| mithro | BRB for the GSoC meeting | 11:56 |
| shenki | see you there | 11:56 |
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| shenki | + sudo adduser root dialout | 12:00 |
| shenki | The user `root' is already a member of `dialout'. | 12:00 |
| shenki | thats wrong | 12:00 |
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| rohitksingh | hello! turns out the all 3 independent internet lines at Numato office have died today. I'm on from mobile hotspot, so please excuse (dis)connection issues. | 12:06 |
| rohitksingh | anyone present on VC? | 12:07 |
| mithro | Okay, here now | 12:07 |
| xfxf | rohitksingh: hi! i'm trying to connect in | 12:07 |
| mithro | I wasn't planning on doing a VC | 12:08 |
| rohitksingh | xfxf: hi! :) | 12:08 |
| rohitksingh | ohh | 12:08 |
| rohitksingh | good then | 12:08 |
| xfxf | oh right | 12:08 |
| xfxf | just here? | 12:08 |
| _florent_ | hi | 12:08 |
| xfxf | hi! | 12:08 |
| rohitksingh | _florent_ hi! | 12:09 |
| xfxf | aw man you don't get to see my ridiculously stupid big blue gamer headset | 12:09 |
| rohitksingh | hehe :D | 12:09 |
| shenki | oh, right. ive been rushing around getting a laptop to do a vc :) | 12:09 |
| tija | Hello everyone! | 12:09 |
| rohitksingh | shenki: same here...I freaked out after knowing that all net lines were down | 12:10 |
| shenki | hey tija | 12:10 |
| shenki | rohitksingh: :) | 12:10 |
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| shenki | booted the kernel in the sim | 13:15 |
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| mithro | _florent_: What frequency is the SDRAM on the Atlys suppose to be running at? 300MHz with sysclk of 75MHz? | 14:00 |
| mithro | I feel deja vu with that question :P | 14:01 |
| _florent_ | mithro: yes 300Mhz on Atlys (1:2 phy), 400MHz on Opsis (1:4 phy) | 14:13 |
| mithro | _florent_: Great! I added some asserts which checked the PLL was generating the right speed clock signals and found out a bunch of my comments were wrong | 14:14 |
| _florent_ | ok good | 14:14 |
| shenki | place and route is taking forever :/ | 14:18 |
| mithro | shenki: are you targetting the HDMI2USB target? | 14:33 |
| mithro | shenki: use the base target, it takes like 5 minutes | 14:33 |
| mithro | shenki: you probably want to target the Opsis as well, I think I still have your Atlys, right? | 14:33 |
| mithro | _florent_: btw, what are your plans around merging the stuff in the opsis_soc into the HDMI2USB firmware? | 14:36 |
| mithro | shenki: export BOARD=opsis; export TARGET=base | 14:37 |
| _florent_ | mithro: I'd like to get things working on the opsis_soc and then merge everything that is needed | 14:37 |
| _florent_ | hdmi_in was easy to convert | 14:37 |
| _florent_ | hdmi_out need to be refactored if we want to avoid using DataflowGraph that was removed from Migen | 14:38 |
| _florent_ | jpeg encoder will be easy to re-integrate | 14:38 |
| shenki | mithro: oh, ok. should have asked about that a few hours ago :) | 14:39 |
| shenki | Intermediate status: 1679 unrouted; REAL time: 1 hrs 2 mins 16 secs | 14:39 |
| shenki | still going | 14:39 |
| shenki | mithro: i should kill it? | 14:39 |
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| shenki | mithro: im doing all this work on my novena. i should add a target for that | 14:41 |
| _florent_ | shenki: you are using hdmi2usb on the novena FPGA? | 14:42 |
| shenki | _florent_: no, i haven't touched the fpga yet | 14:42 |
| shenki | _florent_: im just using it as a very expensive console :) | 14:42 |
| _florent_ | ah ok... :), at least if you want to try, it should use the same DDR3 memory | 14:43 |
| shenki | oh cool | 14:43 |
| shenki | _florent_: do you have one? | 14:43 |
| _florent_ | yes, but I haven't done too much things with it for now | 14:44 |
| mithro | Even the video VideoMixerSoC is much faster than the full HDMI2USB SoC - it seems the JPEG encoder makes things crappy - hence the rewrite :) | 14:44 |
| mithro | _florent_: BTW Do you think that moving the firmware into the SPI flash would change the PAR at all? I was thinking that it would just end up freeing block RAM? | 14:45 |
| mithro | _florent_: at some point you'll need to do a liteAXI so that we can interface a hard core to the FPGA on the Novena and Zynq ICs | 14:46 |
| _florent_ | maybe. If you want you can test by removing the firmware ram, it will not be fonctionnal, but we will have an idea if it eases things | 14:47 |
| mithro | _florent_: fixing these timing constraints seem to make the long compile time happen less often too | 14:47 |
| _florent_ | we already have stream interface that are very close to AXI in misoc | 14:47 |
| _florent_ | AXI is just some stream interfaces coupled togethers | 14:47 |
| mithro | I believe the ARM and FPGA on the Novena are set up for AXI? | 14:48 |
| mithro | I know nothing about AXI :P | 14:48 |
| mithro | http://www.xilinx.com/products/intellectual-property/axi_interconnect.html | 14:48 |
| tpb | Title: AXI Interconnect (at www.xilinx.com) | 14:48 |
| mithro | _florent_: I think we might want an AXI compatible bit because ARM cores can natively talk it? | 14:48 |
| mithro | Sadly the Novena can't be used to compile gateware | 14:51 |
| mithro | shenki: So, what do I have to do to convince your Cyanogen friend I'm meeting on Saturday to start hacking on HDMI2USB stuff? :P | 14:53 |
| * mithro is going to walk home now - will be online from phone | 14:53 | |
| shenki | mithro: hah! he's taking a gap year to do cygn security work for the year | 14:54 |
| shenki | mithro: so in one sense he has lots of time | 14:54 |
| mithro | shenki: I haven't tested the MiSoC BIOS boots on the or1k yet | 14:58 |
| shenki | mithro: what did you test? | 14:58 |
| shenki | wow, ok, firmware built | 14:58 |
| shenki | that was quick | 14:58 |
| mithro | It compiles :-) | 14:59 |
| shenki | ok | 14:59 |
| shenki | you should try it on the sim | 14:59 |
| shenki | not going to get an opsis out tonight, will play again on the weekend | 14:59 |
| mithro | Should I send your Atlys back with this guy or my parents? | 14:59 |
| mithro | I wonder what it would so in the aim simulator | 15:00 |
| mithro | I doubt it simulates a MiSoC DDR ram core :-P | 15:00 |
| _florent_ | mithro: you can run the entire SoC (including the MiSoC DDR ram core) with verilator, you can expect 1MHz speed, which is proably enough to develop software | 15:04 |
| mithro | The m-labs guys use clang for artiq which uses a or1k | 15:05 |
| mithro | shenki: see above | 15:05 |
| mithro | shenki: still probably faster then MOOSE ;-) | 15:06 |
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| mithro | shenki: https://github.com/enjoy-digital/litex/blob/master/litex/boards/targets/sim.py | 15:19 |
| tpb | Title: litex/sim.py at master · enjoy-digital/litex · GitHub (at github.com) | 15:19 |
| shenki | mithro: hah, moose, that's a blast from the past | 15:20 |
| mithro | shenki: that apparently runs under verilator and can be set up with a or1k CPU --cpu_type or1k | 15:20 |
| shenki | nice | 15:21 |
| shenki | verilator is the project that compiles hdl to binaries? | 15:22 |
| shenki | or am i thinking of ghdl | 15:22 |
| mithro | http://www.veripool.org/wiki/verilator | 15:22 |
| tpb | Title: Intro - Verilator - Veripool (at www.veripool.org) | 15:22 |
| mithro | Verilator is the fastest free Verilog HDL simulator, and beats most commercial simulators. It compiles synthesizable Verilog (not test-bench code!), plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to | 15:23 |
| mithro | generate executable models of CPUs for embedded software design teams. | 15:23 |
| shenki | cool | 15:24 |
| shenki | so it runs ok on your laptop? Or you need to use a big machine? | 15:24 |
| mithro | shenki: NFI - never used it | 15:25 |
| mithro | but I think by the sounds of it, it would work okay on any modern machine | 15:25 |
| mithro | The verilator page looks like a blast from the 1990s :P | 15:26 |
| mithro | https://github.com/timvideos/HDMI2USB-misoc-firmware/issues/86 | 15:26 |
| tpb | Title: Get lm32 firmware running under qemu to enable testing without hardware · Issue #86 · timvideos/HDMI2USB-misoc-firmware · GitHub (at github.com) | 15:27 |
| mithro | shenki: Florent did a recording of it running https://asciinema.org/a/18224 | 15:27 |
| shenki | what? he's simulating the ethernet device?! | 15:32 |
| shenki | that's cool | 15:32 |
| mithro | Seems so | 15:40 |
| mithro | Anyway, bed time for me | 15:40 |
| shenki | good night | 15:43 |
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