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CarlFK | mithro: Can you check the jumpers on the board and make sure that the Cypress Reset line is properly connected? | 02:28 |
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CarlFK | where are jumpers defined ? | 02:28 |
mithro | CarlFK: https://github.com/timvideos/HDMI2USB-numato-opsis-hardware/blob/master/doc/Numato-Opsis-v3-prod-3-g83e7bd5.pdf | 02:29 |
tpb | Title: HDMI2USB-numato-opsis-hardware/Numato-Opsis-v3-prod-3-g83e7bd5.pdf at master · timvideos/HDMI2USB-numato-opsis-hardware · GitHub (at github.com) | 02:29 |
mithro | CarlFK: We need to get some pictures and stuff of each of the jumpers | 02:33 |
mithro | CarlFK: but I haven't had time too | 02:33 |
CarlFK | mithro: I see cypress-reset on that PDF, but I don't see how that relates to physical location on the board | 02:38 |
mithro | It'll have the same labels | 02:38 |
CarlFK | mithro: conn_3 K3? | 02:41 |
mithro | It'll be near the Cypress FX2 chip somewhere | 02:41 |
CarlFK | also, is there something I can hook the case's power switch and led to? (mainly so the wires aren't flopping around, and half the time making it hard to close the case | 02:41 |
mithro | CarlFK: yes, there is a connector labeled something like PC Reset | 02:42 |
CarlFK | is the Cypress FX2 chip the other big chip besides the FPGA ? | 02:44 |
mithro | It's the one near the large USB connector | 02:44 |
CarlFK | the labels are very hard to read | 02:44 |
CarlFK | mithro: is the reset jumper one of these? https://plus.google.com/photos/photo/101817321389198875733/6265074098290865794?sqid=111984976401772983232&ssid=ff38058e-1d22-4e7c-95d2-f514dceaa6e3 | 02:53 |
tpb | Title: Google+ (at plus.google.com) | 02:53 |
mithro | CarlFK: no, I think it's the one in the corner that is closer to the USB connector? | 02:55 |
CarlFK | https://plus.google.com/photos/photo/101817321389198875733/6265074012698478690?sqid=111984976401772983232&ssid=ff38058e-1d22-4e7c-95d2-f514dceaa6e3 | 02:55 |
tpb | Title: Google+ (at plus.google.com) | 02:55 |
CarlFK | using my phone camera, hard to get the focus and lighting good | 02:55 |
mithro | That photo is too fuzzy for me to tell | 02:57 |
mithro | Is it labelled K3? | 02:57 |
CarlFK | yeah, I think that says K3 and fx2-reset | 02:58 |
CarlFK | jumper is between pin 2 and 3 | 02:58 |
mithro | CarlFK: okay, that looks correct | 02:59 |
mithro | CarlFK: for the next bit, you are going to need a multi-meter or oscilloscope | 03:00 |
mithro | CarlFK: basically you want to watch what happens to the voltage on Pin 3 when the FX reset output is occuring | 03:00 |
CarlFK | mithro: sorry, no scope and I can't find a meter ... I have the case led, would that work? | 03:08 |
mithro | Dunno | 03:09 |
mithro | You did see the script I linked which doesn't need this part to work? | 03:10 |
CarlFK | it errored with "not implemented" ... I think... have it handy Ill try again | 03:12 |
CarlFK | shouldn | 03:12 |
CarlFK | er | 03:12 |
mithro | CarlFK: are you using the opsis-prod branch from my repo, like I linked? | 03:13 |
CarlFK | I can't say for sure - right now I am trying to use the serial port and failing | 03:15 |
CarlFK | happy to do something else and report results | 03:15 |
CarlFK | is there a cad file for the board so I have a better hope at reading labels? | 03:16 |
mithro | CarlFK: Those label seems to be pretty readable via the clear photo.... | 03:22 |
mithro | CarlFK: you can look at the gerber files, but they need a special reader | 03:22 |
CarlFK | mithro: I wanted to find PC Reset and anything else I may need to find | 03:24 |
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mithro | CarlFK: the PC reset is near PCI-Express connector | 03:24 |
mithro | CarlFK: https://opsis.hdmi2usb.tv/getting-started/layout.html | 03:26 |
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mithro | sab_123: You had some questions yesterday? | 03:28 |
mithro | Oh, that was ssk1328_ | 03:29 |
sab_123 | mithro : :-) | 03:29 |
sab_123 | I am looking at adding XIlinx Platform cable support | 03:30 |
CarlFK | mithro: FPGA & Memory Layout ...highlighted in Pink - I see "pwr+rst" next to a 9 pin header | 03:30 |
mithro | CarlFK: yeah - that is the one | 03:30 |
mithro | I believe _florent_ was going to make that work | 03:30 |
CarlFK | mithro: have a guss what should I hook the button and led to? | 03:31 |
CarlFK | mithro: guessing rst is 7-9 ? | 03:31 |
CarlFK | er, no.. I can't count | 03:32 |
CarlFK | 5-7 | 03:32 |
mithro | CarlFK: check the schematic? | 03:35 |
CarlFK | mithro: I am looking at the pdf: 5 goes to R116/100R to ground, 7 to RST - Does that sound like a good place for the switch? | 03:49 |
mithro | Pressing the reset switch will effectively "short" the two pins together, hence it will pull the reset line to ground if your description is correct (effectively making it a zero). I think this is what we want | 03:50 |
mithro | CarlFK: that bank should be laid out like found on a PC motherboard | 03:52 |
CarlFK | mithro: shorting random pins probably wont damage anything, right? | 03:52 |
mithro | CarlFK: that is what the 100R resistor is there to prevent | 03:53 |
CarlFK | mithro: any idea what the different LEDs show? | 03:54 |
mithro | What do you mean? | 03:56 |
mithro | I'm pretty sure they aren't connected to anything at the moment | 03:56 |
CarlFK | on that header is LED1 LED23 and INFO - given I have 1 led, I was wondering what the choices are | 03:57 |
mithro | CarlFK: I'm sure at the moment they are all equally not in use | 04:00 |
mithro | CarlFK: please update the docs with the above information | 04:08 |
CarlFK | mithro: there are 2 leds on the board: red seems to be power, it is always on when powered. blue is labeled "done" | 04:23 |
CarlFK | I am guessing blue goes out when it is done booting? | 04:24 |
mithro | CarlFK: That sounds about right | 04:24 |
CarlFK | mithro: ok, so when I power it up, blue is on for 5 sec. it goes out. I hit the switch, blue comes on, 5 sec, goes off... | 04:25 |
CarlFK | but.... | 04:25 |
CarlFK | if I hit the button ~a while~ (60 seconds?) later, no blue or anything | 04:26 |
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CarlFK | rohitksingh: I have your vga board plugged into my Atlys... and want to try it soon. like in 8 hours because it is about bed time | 04:53 |
mithro | CarlFK: as I said, I don't think the button does anything | 04:54 |
mithro | oh wait | 04:54 |
mithro | CarlFK: the button *is* doing something? | 04:54 |
CarlFK | mithro: yes | 04:54 |
mithro | CarlFK: Interesting | 04:54 |
CarlFK | but only if I press it before X seconds.. and I am not sure what X is. might be 10 seconds | 04:55 |
mithro | CarlFK: Time for you to learn to read schematics :P | 04:55 |
rohitksingh | CarlFK: Hi! :) try these instructions https://github.com/timvideos/HDMI2USB-misoc-firmware/issues/30#issuecomment-171224680 | 04:57 |
rohitksingh | currently works at 1024x768@60p only | 04:57 |
rohitksingh | and encoder has not been added | 04:57 |
rohitksingh | I'll add the encoder today, since I've holiday today! :) | 04:58 |
mithro | CarlFK: I don't have a production Opsis board at the moment | 05:01 |
ssk1328 | mithro: Hi | 05:09 |
ssk1328 | I am working on the proposal right now. Do you think hardware mixer block plus test cases for board working be enough for GSoC. | 05:10 |
ssk1328 | As complete implementation of Hardware fader block will be the focus. https://github.com/timvideos/getting-started/issues/34 | 05:12 |
tpb | Title: [HDMI2USB] Add "hardware mixing" support to HDMI2USB firmware · Issue #34 · timvideos/getting-started · GitHub (at github.com) | 05:12 |
ssk1328 | And apart from this, write several test cases to test the functionality of Opsis board. https://github.com/timvideos/HDMI2USB-misoc-firmware/issues/185 | 05:12 |
tpb | Title: Embed a wide range of test patterns · Issue #185 · timvideos/HDMI2USB-misoc-firmware · GitHub (at github.com) | 05:12 |
mithro | ssk1328: It depends on your skill level :) - A really skilled student would finish that in a couple of weeks (IE someone who was better then myself :) | 05:14 |
mithro | ssk1328: I think for the average "good student" - Getting the hardware mixing which does all the things like wipes and fades would probably be a good 2-3 months work | 05:15 |
mithro | ssk1328: Have you started writing your GSoC proposal yet? | 05:15 |
ssk1328 | Yeah | 05:15 |
ssk1328 | I was finishing some sections. | 05:16 |
mithro | ssk1328: Are you using Google Docs? | 05:17 |
ssk1328 | Okay, so I will try to be an above average "good student" and try to attempt testing part as well if time remains. | 05:17 |
ssk1328 | Should I share it in the uncompleted form. | 05:17 |
ssk1328 | ? | 05:17 |
ssk1328 | Yeah I am using Google Docs | 05:17 |
mithro | ssk1328: Yes, please do share the uncompleted doc | 05:18 |
mithro | ssk1328: We'll then make sure you are heading in the right direction and not spending too much time on things which aren't important | 05:18 |
ssk1328 | Okay | 05:18 |
mithro | ssk1328: When I say the above, I do mean that the stuff should be tested. | 05:18 |
mithro | Doing some static patterns in #185 should be a day or two of work | 05:19 |
mithro | Doing the dynamic patterns in #185 should be a couple of days work once the hardware mixing is working | 05:19 |
ssk1328 | Yeah, the mixer block will definitely be tested. | 05:19 |
ssk1328 | Here is a link to my proposal https://docs.google.com/document/d/1uhbUYtTH7VOVsUT6NcR71n1Nn-kObnxbUHTdwTCAnjQ/edit | 05:20 |
tpb | Title: [GSoC16] Project Proposal: Add "Hardware Mixing Support" - Google Docs (at docs.google.com) | 05:20 |
CarlFK | mithro: "Software flow control wouldn't fix the problem you are encountering either, as cat wouldn't use it." | 05:24 |
CarlFK | mithro: I think this will ... | 05:24 |
CarlFK | http://man.cx/stty ixon "Output from the system is stopped when the system receives STOP and started when the system receives START. " | 05:24 |
tpb | Title: Manpage for stty - man.cx manual pages (at man.cx) | 05:24 |
mithro | CarlFK: Arn't you just doing "cat FILE > /dev/ttyACM0" or something like that? | 05:25 |
CarlFK | mithro: well, at the moment I am not doing anything because nothing works | 05:25 |
CarlFK | mithro: but I think stty lets me set things so that then cat FILE > /dev/ttyACM0" should work .. assuming the Opsis sends start/stop chars | 05:26 |
mithro | CarlFK: Does deeprave's stuff work? | 05:29 |
CarlFK | mithro: no idea. I got the feeling it was "almost done" and then never finished | 05:29 |
CarlFK | mithro: or another idea - can we slow down the baud rate so that the Opsis side has time to move the char out of the buffer before the next one comes in? | 05:29 |
mithro | CarlFK: If I understand what is happening correctly, the problem is in the FX2 | 05:30 |
CarlFK | mithro: that doesn't mean anything to me. | 05:31 |
mithro | CarlFK: I'm pretty sure fixing that will reduce the problem significantly | 05:32 |
mithro | CarlFK: The FX2 is the USB<->FPGA interface, like I've mentioned literally a bazillion times | 05:32 |
CarlFK | mithro: what file(s) should someone look at to fix it? | 05:33 |
mithro | CarlFK: did you look at the branch I linked at all? | 05:34 |
CarlFK | mithro: I look at everything you suggest | 05:35 |
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mithro | https://github.com/timvideos/HDMI2USB-misoc-firmware/compare/master...mithro:fx2-refactor | 05:36 |
tpb | Title: Comparing timvideos:master...mithro:fx2-refactor · timvideos/HDMI2USB-misoc-firmware · GitHub (at github.com) | 05:36 |
CarlFK | mithro: um.. " Showing with 2,404 additions and 844 deletions" | 05:40 |
CarlFK | mithro: not sure why I am looking at that | 05:40 |
sab_123 | mithro : sent an email | 05:40 |
mithro | CarlFK: because that shows you the start of the stuff needed to fix this problem | 05:42 |
CarlFK | mithro: that looks like way more | 05:54 |
mithro | CarlFK: it's not a simple thing to "just fix" | 05:54 |
CarlFK | mithro: if that isn't simple, shouldn't we try dropping the baud and seeing if that works around it? | 06:00 |
mithro | CarlFK: That will just make the problem worse | 06:00 |
CarlFK | I am going bonkers trying to work around it on the (what side are my scripts on, the host side?) | 06:00 |
mithro | CarlFK: The problem is that the host just shovels the characters down the USB faster than the FX2 can shovel them over to the FPGA | 06:01 |
mithro | CarlFK: when setting the baud rate, all the computer does is send a USB command which is "set your baud rate to XXXX" | 06:02 |
mithro | CarlFK: it doesn't effect how fast it shovels data down the USB | 06:02 |
CarlFK | oh.. I think i see ... | 06:03 |
mithro | CarlFK: This is caused by the FX2 firmware not fully implementing the USB serial standard properly and exacerbated by the FX2 output code being really crappy (working at like 5% efficiency) | 06:04 |
CarlFK | mithro: ok, I'll go back to throttling the cat command. I think I am close. I gave up when it seemed to be eating my \n chars. or sending them as 2 chars: \ and n. | 06:08 |
mithro | CarlFK: I'm pretty sure that deeprave had a very simple python script which would trickle a file down the serial port | 06:09 |
CarlFK | none of what I saw looked simple | 06:09 |
mithro | CarlFK: The hdmi2usb daemon was after that | 06:09 |
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mithro | bblr | 06:42 |
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sab_123 | mithro:https://github.com/mithro/fx2-ftdi-emulation | 07:31 |
tpb | Title: GitHub - mithro/fx2-ftdi-emulation: Firmware for the FX2 which emulates the FTDI serial chips (including MPSSE support). (at github.com) | 07:31 |
sab_123 | There doesnt seem to be any issues | 07:32 |
sab_123 | Is there any other repo | 07:32 |
sab_123 | https://github.com/mithro/fx2lib/issues/4 | 07:32 |
tpb | Title: Create example firmware which emulates the FTDI usb-serial devices · Issue #4 · mithro/fx2lib · GitHub (at github.com) | 07:33 |
mithro | sab_123: That code doesn't actually work yet | 07:33 |
sab_123 | wow | 07:33 |
sab_123 | okay | 07:33 |
sab_123 | I didnt know that | 07:33 |
mithro | sab_123: you should assume nothing works until you have confirmed that it works | 07:34 |
sab_123 | mithro: ok | 07:35 |
sab_123 | mithro: when you say ftdi emulation | 07:40 |
sab_123 | We still use SLave FIFO to transfer data into FX2 | 07:40 |
sab_123 | Then write custom logic to map pins to rxd to txd | 07:40 |
sab_123 | So we need some form of flow control | 07:40 |
sab_123 | How do you plan to achieve this? | 07:41 |
sab_123 | Or shall we just assume device can read data at 115200 | 07:41 |
sab_123 | and no flow control is needed | 07:41 |
mithro | https://github.com/mithro/fx2-ftdi-emulation/blob/master/MODES.md | 07:41 |
tpb | Title: fx2-ftdi-emulation/MODES.md at master · mithro/fx2-ftdi-emulation · GitHub (at github.com) | 07:41 |
sab_123 | yes | 07:42 |
sab_123 | I am looking right now at it | 07:42 |
sab_123 | Do we need the optional | 07:42 |
sab_123 | or Rxd/txd is enough | 07:42 |
mithro | All those modes should work | 07:42 |
mithro | The optional signals all need to be bit banged. | 07:42 |
sab_123 | i was thinking | 07:43 |
sab_123 | something like a high speed UART | 07:43 |
sab_123 | So you have SLAVE FIFO to send in data | 07:43 |
sab_123 | and send it out | 07:43 |
sab_123 | but really really high spee | 07:43 |
sab_123 | or do you want to bit bang UART | 07:43 |
sab_123 | Slave FIFO is well tested | 07:43 |
mithro | sab_123: that is the "FIFO Modes" | 07:43 |
sab_123 | Well I am talking about mapping FIFO to UART | 07:44 |
sab_123 | FIFO is high speed | 07:44 |
sab_123 | 8 or 16 lines | 07:44 |
sab_123 | but UART is alower | 07:44 |
mithro | sab_123: everything on that page should work | 07:44 |
sab_123 | So I wanted to know if you wanted something like a FIFO UART bridge | 07:44 |
sab_123 | or Just UART | 07:44 |
sab_123 | and just FIFO | 07:44 |
mithro | sab_123: I want *everything* | 07:45 |
sab_123 | but these are well tested stuff | 07:45 |
sab_123 | what do you want me to do? | 07:45 |
sab_123 | Maybe bitbang UART | 07:45 |
sab_123 | But I2c, JTAG etc are already there in fx2lib | 07:45 |
mithro | sab_123: What don't you understand about the *everything* bit ? | 07:45 |
mithro | sab_123: the firmware should emulate all functionality of the ftdi chip | 07:46 |
sab_123 | in 1 firmware | 07:46 |
sab_123 | or can reaload | 07:46 |
mithro | sab_123: Including UART modes, FIFO UART bridge modes, MSSPE modes | 07:46 |
sab_123 | same hex file? | 07:46 |
mithro | sab_123: If possible | 07:46 |
sab_123 | mithro: my question is amny of these modes already exist | 07:47 |
sab_123 | many | 07:47 |
sab_123 | I can combine it | 07:47 |
sab_123 | and check for conflicts | 07:47 |
mithro | sab_123: no, none of that functionality exists yet - some bits are started | 07:47 |
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sab_123 | well slave fifo is an appnote | 07:48 |
sab_123 | but in keil | 07:48 |
mithro | sab_123: yes, but emulating the slave fifo mode of the FTDI chip is not as simple as just using that appnote | 07:48 |
mithro | sab_123: you understand what an FTDI chip is, right? | 07:49 |
sab_123 | http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT2232H.pdf | 07:50 |
sab_123 | This chip is what youw ant to emulate ? | 07:50 |
sab_123 | H | 07:50 |
sab_123 | there are many versions | 07:51 |
sab_123 | I assume you want H | 07:51 |
sab_123 | you use FTDI drivers | 07:52 |
sab_123 | which many people really dont like after the stunt they pulled | 07:52 |
sab_123 | * I mean you want me to use FTDI drivers and make it compatible correct | 07:52 |
mithro | sab_123: Yes, it should work with the FTDI drivers, libftdi, linux kernel drivers, etc | 07:56 |
sab_123 | mithro: I think then that this is big enough for a GSOC project | 07:57 |
sab_123 | what do you think | 07:57 |
sab_123 | emulating a whole IC like FT2232 and getting it working is going to take quite some time | 07:57 |
sab_123 | can i talk only about this for hte proposal? | 07:59 |
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mithro | bblr | 09:15 |
mithro | sab_123: I don't think emulating the FT2232 will take a full 3 months of full time work | 09:15 |
sab_123 | mithro : :-) | 09:15 |
sab_123 | I knew you will say that | 09:15 |
mithro | sab_123: I recon that there is probably 2-3 weeks worth of full time work for myself - which is probably 1/1.5 months of work for someone unfamiliar with it | 09:16 |
sab_123 | i dont want to commit to too much | 09:16 |
sab_123 | thats the only thing i am afraid of | 09:16 |
mithro | sab_123: Start planning out what you want to do | 09:19 |
mithro | sab_123: that will help you assess if the timeline is accurate | 09:19 |
mithro | sab_123: Maybe there is something I'm missing | 09:20 |
mithro | sab_123: maybe you have missed some important work which has already been done | 09:20 |
mithro | sab_123: you won't know until you have more details fleshed out | 09:20 |
sab_123 | okay | 09:20 |
sab_123 | do you actually type sab_123 on each line | 09:21 |
sab_123 | There must be some elegant way of doing this | 09:21 |
mithro | sab_123: we also expect that what you end up doing will only vaguely look like what you initially proposed - that is the curse of software development :) | 09:21 |
mithro | I type s then hit tab and my client completes it | 09:21 |
sab_123 | ah | 09:22 |
sab_123 | IRC Cloud | 09:22 |
sab_123 | mithro, | 09:22 |
sab_123 | this does it too | 09:22 |
sab_123 | cool | 09:22 |
mithro | It's a pretty common thing in most IRC clients | 09:22 |
mithro | anyway, have to run now | 09:22 |
sab_123 | take care | 09:23 |
sab_123 | bye | 09:23 |
mithro | sab_123: start a Google doc, put the stuff here into it, start fleshing out the ideas and breaking them down into periods of a couple of days | 09:23 |
mithro | with milestones and such | 09:23 |
sab_123 | will do it today night | 09:23 |
mithro | sab_123: share the document as soon as you have started to put some type of timeline together | 09:23 |
sab_123 | i am just looking at apertus group | 09:24 |
sab_123 | seeing if I can get an internship | 09:24 |
sab_123 | because that stuff seems to be much closer to my work | 09:24 |
sab_123 | i just wanted to be honest and let you know | 09:25 |
sab_123 | :-) | 09:25 |
sab_123 | hope you are fine with that | 09:25 |
mithro | Sure | 09:25 |
mithro | sab_123: but if you missed a GSoC deadline, there is nothing we can do for you - that is out of our hands | 09:26 |
mithro | So do keep that in mind | 09:28 |
sab_123 | mithro; whatever you do | 10:09 |
sab_123 | JTAG | 10:09 |
sab_123 | I2C | 10:09 |
sab_123 | UART | 10:09 |
sab_123 | mithro, you will need to use slave fifo right | 10:09 |
sab_123 | only what you do with the data will be different | 10:09 |
mithro | JTAG and I2C are normally done with the MSPE engine | 10:10 |
sab_123 | for FX2 | 10:10 |
mithro | sab_123: it also depends on the pins you want to use on the FX2 | 10:10 |
sab_123 | howw do you plan to get data in | 10:10 |
sab_123 | only USB si there | 10:10 |
sab_123 | is | 10:10 |
sab_123 | so i am thinking | 10:11 |
sab_123 | build a good slave fifo module to use as data capture | 10:11 |
sab_123 | then build erverything around it | 10:11 |
mithro | I still don't think you understand this project | 10:11 |
sab_123 | mithro, what do you say that | 10:11 |
sab_123 | why | 10:11 |
sab_123 | okay | 10:14 |
sab_123 | So you want all the functionality that FT2232H on FX2 | 10:14 |
sab_123 | by modifying firmware of FX2 | 10:14 |
sab_123 | So for example for UART | 10:14 |
sab_123 | you want FX2 to appear as a COM device | 10:15 |
sab_123 | so you use putty and write to it | 10:15 |
mithro | sab_123: let's think about this in a different way | 10:15 |
mithro | sab_123: There are two "sides" to this problem | 10:15 |
mithro | sab_123: One side is the USB protocol - here we want to emulate a FTDI chip | 10:15 |
mithro | sab_123: but there are actually multiple protocols the FTDI chip implements | 10:16 |
mithro | sab_123: on the FX2 side there are multiple ways to connect the FX2 chip to something else | 10:17 |
mithro | using the hardware uart, bitbanging, the FX2 FIFO interface, etc | 10:17 |
mithro | have to run, will continue this conversation later | 10:17 |
sab_123 | ok | 10:17 |
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CarlFK | rohitksingh: are you here for an hour or so? | 13:51 |
CarlFK | if so I'll hook up my Atlys and try your vga code | 13:52 |
rohitksingh | CarlFK: Hi! Yeah! | 13:59 |
CarlFK | yay! brb | 13:59 |
rohitksingh | awesome | 13:59 |
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CarlFK | ok, plugged in... | 14:36 |
CarlFK | carl@twist:~/Downloads$ md5sum atlys_base-basesoc-atlys.bit | 14:37 |
CarlFK | e6819fc63c8a2e3a8bb1962d3ee3c1be atlys_base-basesoc-atlys.bit | 14:37 |
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CarlFK | loaded file atlys_base-basesoc-atlys.bit to pld device 0 in 13s 910206us | 15:05 |
CarlFK | getting there slowly... keep getting distracted | 15:05 |
rohitksingh | CarlFK: awesome | 15:19 |
rohitksingh | now give the board VGA input at 1024x768@60Hz | 15:19 |
CarlFK | VGA1 connected primary 1024x768+0+0 (normal left inverted right x axis y axis) 0mm x 0mm | 15:37 |
CarlFK | HDMI2USB> status | 15:38 |
CarlFK | [AD9984A] Register : 0x01, Value : 0x54 | 15:38 |
CarlFK | [AD9984A] Register : 0x02, Value : 0x00 | 15:38 |
CarlFK | [AD9984A] No. of hsync per vsync: 806 | 15:38 |
CarlFK | rohitksingh: why is there a counter on the test pattern? | 15:40 |
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rohitksingh | CarlFK: just to make sure the lm32 core is active and running properly I guess... | 15:48 |
CarlFK | rohitksingh: but I have never seen it before | 15:48 |
rohitksingh | CarlFK: the values look good... try "vga_switch on" command | 15:48 |
rohitksingh | and check if vga if getting captured properly or not | 15:49 |
CarlFK | Switching on VGA output on HDMI_OUT0... | 15:49 |
CarlFK | looking good | 15:50 |
CarlFK | well, looks like 1024x768 stretched to a 16:9 display | 15:50 |
rohitksingh | CarlFK: vga capture is working? there might be gamma, gain and saturation problem, will have to correct those in registers | 15:51 |
CarlFK | it is working | 15:51 |
rohitksingh | ohh thats probably due to your monitor i guess | 15:51 |
CarlFK | yeah | 15:51 |
rohitksingh | CarlFK: awesome! you are the first one to get it working apart from me, if I recall correctly! :) | 15:52 |
CarlFK | woot! | 15:52 |
rohitksingh | :) | 15:53 |
CarlFK | I am trying to figure out how to display some test patterns | 15:53 |
rohitksingh | you want to program your own test patterns? the code is in pattern.c file! you can just create your own ones! | 15:55 |
CarlFK | rohitksingh: what are the chances of changing or adding 1280x720? | 15:55 |
CarlFK | no, I want the vga source to send a test pattern to your board | 15:56 |
rohitksingh | its actually not that tough. Its on ToDo list. I'll do that tonight! | 15:56 |
CarlFK | that wold be fricken fantastic | 15:56 |
rohitksingh | ohh okay! no idea on softwares which generate test patterns :/ | 15:57 |
CarlFK | meh, just need to display an image where I have some idea what the colors should look like | 16:00 |
CarlFK | so far the little I have done looks fine | 16:00 |
CarlFK | how do I send vga to encoder ? | 16:04 |
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rohitksingh | CarlFK: encoder is not added yet! Will add that too! this was just a Proof of Capture | 16:32 |
rohitksingh | after correct capture to DDR memory, we can use rest of the infrastructure (like encoders etc) as is | 16:33 |
CarlFK | ah... ok. | 16:37 |
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CarlFK | mithro: I am at PS1 with multi meters and scopes. and Opsis board. | 23:21 |
CarlFK | mithro: do you have any time to help me with the fx2_reboot jumper thingy? | 23:23 |
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