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_florent_ | mithro: no, digilent hasn't contacted me | 08:54 |
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mithro | _florent_: I assume everything in litex is just the stuff that has been evicted from misoc/migen? | 13:19 |
mithro | _florent_: as far as you know, the jpeg core should be deterministic, right? Given the exact same input frame it should produce exactly the same output bytes? | 13:42 |
ysionneau | mithro: I received the FX2LP board! | 13:51 |
ysionneau | o/ | 13:51 |
mithro | Yay | 13:51 |
ysionneau | I gave a bit of thought to the double buffering stuff, I think there is a TOCTU issue in this story | 13:52 |
mithro | TOCTU? | 13:52 |
ysionneau | toctou* time of check time-of-use | 13:52 |
ysionneau | let me explain maybe I didn't thought this well enough | 13:52 |
ysionneau | if you load both buffers (normal and next) because you predict 2 reads in a row | 13:53 |
ysionneau | then you loop and check the status register | 13:53 |
ysionneau | then you detect the first read has been done | 13:53 |
ysionneau | what you will want to do is to refill, right? | 13:54 |
ysionneau | but you would need to do something like : normal = next ; next = some_new_data | 13:54 |
ysionneau | cause I was thinking the gateware would work like this : if not(normal_empty) then use_normal; elseif not(next_empty) then use_next else error | 13:56 |
ysionneau | but now I'm thinking ... maybe I should do (and maybe that's what you had in mind and I didn't get it) : you always refill only buffer_next (except the first time), and the gateware automatically copies buffer_next to "buffer_regular" when one read has been done | 14:01 |
ysionneau | hmm sorry for the mess now I'm thinking out loud | 14:01 |
ysionneau | mithro : anyway important question : now that I've the board, do you want me to test the current (simple buffered with clock stretching) code? Or do you want me to add the double buffer feature and *then* check? | 14:02 |
mithro | You can't do that because if you get the prediction wrong, you need to overwrite the current valye | 14:02 |
mithro | After the end of a read operation there are two possibilities, either the master keeps clocking for another read | 14:05 |
mithro | Or the master starts a new i2c transaction | 14:05 |
ysionneau | yes | 14:06 |
mithro | Well, you should test the clock stretching approach - because that is needed for some things even with the buffer optimisation | 14:07 |
mithro | But I wouldn't be surprised if the FX2 fails to read from the EEPROM with clock stretching enabled for initial boot | 14:08 |
ysionneau | oh | 14:08 |
ysionneau | ok, let's hope not I should be able to tell you in a couple of hours | 14:08 |
mithro | We will see | 14:12 |
mithro | I might get you to look at https://github.com/timvideos/HDMI2USB-misoc-firmware/issues/130 before doing the EDID I2C stuff | 14:13 |
tpb | Title: Calculate CRC code on pixels during frame transfer · Issue #130 · timvideos/HDMI2USB-misoc-firmware · GitHub (at github.com) | 14:13 |
ysionneau | allright | 14:13 |
ysionneau | do you have any dummy led blinker (or other simple stuff) firmware for the fx2? | 14:14 |
ysionneau | firmware or C code | 14:14 |
mithro | Yes | 14:22 |
mithro | Take a look at fx2lib | 14:22 |
mithro | My fork is under mithro | 14:22 |
ysionneau | ok thx | 14:23 |
ysionneau | ok compiled well | 14:24 |
ysionneau | awesome | 14:25 |
ysionneau | very helpful | 14:25 |
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ysionneau | it seems this board is popular because it's being used as a logic analyzer clone :o | 14:39 |
ysionneau | can't find D1 and D2 in the schematics | 14:43 |
_florent_ | mithro: about litex, yes that my fork of MiSoC that I'm going to use to build my cores and build my designs. | 14:50 |
_florent_ | mithro: in fact the digilent package was there :) (but I came back home today) | 15:08 |
_florent_ | mithro: thanks for arranging this with digilent | 15:08 |
* ysionneau can't flash his fx2lp board so far | 16:02 | |
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