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| tija | _florent_ : Did you get the new HDMI2USB running on FPGA? | 12:45 |
|---|---|---|
| _florent_ | hi tija | 12:45 |
| mithro | heyo | 12:45 |
| tija | hi _florent_ | 12:46 |
| mithro | _florent_: sorry I haven't had a chance to respond to your email yet - did you make any independent progress? | 12:46 |
| _florent_ | I'm still working in it but yes it seems to works :) (USB and ethernet) | 12:46 |
| tija | AWESOME! | 12:46 |
| _florent_ | I'm working on the USB to remove all ip cores | 12:47 |
| _florent_ | mithro: np | 12:47 |
| _florent_ | tija: just for info (IIRC you worked on the JPEG encoder), I've found a bug in it when generates the JPEG header | 12:56 |
| _florent_ | it does not handle the output_full signal | 12:57 |
| _florent_ | by fixing this we can remove the large byteFIFOFPGA you have in the current design | 12:57 |
| tija | Are you talking about the the bug mentioned on line 340. | 13:00 |
| tija | https://github.com/timvideos/HDMI2USB/blob/master/hdl/usb/jpg_uvc.vhd | 13:00 |
| tpb | Title: HDMI2USB/jpg_uvc.vhd at master · timvideos/HDMI2USB · GitHub (at github.com) | 13:00 |
| _florent_ | yes probably | 13:05 |
| tija | If that is the bug, then it can be solved by disabling the clock to jpeg encoder when output_full is high. I guess that should solve the problem. | 13:12 |
| _florent_ | yes but it's not very clean :) | 13:14 |
| _florent_ | (imagine you have to do that for all cores...) | 13:14 |
| mithro | The HDMI2USB prod board turned up today! | 13:32 |
| mithro | I never realised how much nicer having all the connectors on one side makes things | 13:34 |
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