Tuesday, 2014-07-22

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mithrohttps://www.fedex.com/fedextrack/html/oldindex.html?tracknumbers=770633168459&cntry_code=au&language=en01:11
tpbTitle: Track your package or shipment with FedEx Tracking (at www.fedex.com)01:11
shenkihere little pcba, come to shenki01:27
mithroshenki: https://github.com/rohit91/HDMI2USB-vmodvga02:37
tpbTitle: rohit91/HDMI2USB-vmodvga · GitHub (at github.com)02:37
mithroshenki: can you give that a review? I dumped a lot of issues into his issue tracker.02:38
aps-sidsmithro: morning. I'm stuck with an issue here. You have a minute?  See here -- http://aps-sids.github.io/porting-flumotion//2014/07/21/flumotion-dvswitch-problems02:48
tpbTitle: Problems porting DVSwitch Flumotion component | GSoC '14 Progress Blog (at aps-sids.github.io)02:48
aps-sidsLine numbers referred in post are for debug log.02:49
mithroaps-sids: yeah, I figured that02:50
mithroaps-sids: I need some links to code02:51
aps-sidsmithro: just a minute02:52
mithroaps-sids: my guess is that your not setting the name=xxx parameter (or not setting it to what you think you are setting it too?)02:53
aps-sidsmithro: here --  https://github.com/aps-sids/flumotion-orig/commits/porting-dvswitch03:00
tpbTitle: Commits · aps-sids/flumotion-orig · GitHub (at github.com)03:00
aps-sidsmithro: This is config I'm using ( from streaming-system ) -- http://pastebin.com/3Rhr5Cxa03:05
tpbTitle: [XML] < - Pastebin.com (at pastebin.com)03:05
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mithroaps-sids: sorry got distracted03:53
mithroaps-sids: I think on https://github.com/aps-sids/flumotion-orig/blob/9fa3fdb39b8b7ef79d0571f91d719337e362c281/flumotion/component/producers/dvswitch/dvswitch.py#L100 you want a "dvswtich name=src %s"03:55
tpbTitle: flumotion-orig/flumotion/component/producers/dvswitch/dvswitch.py at 9fa3fdb39b8b7ef79d0571f91d719337e362c281 · aps-sids/flumotion-orig · GitHub (at github.com)03:56
mithroaps-sids:  but that I think is unrelated04:00
mithroaps-sids: the error seems to indicate that the eater / feeder elements where not correctly set up04:00
shenkihttp://rejectedemojis.tumblr.com/post/9206966627404:27
tpbTitle: Rejected Emojis (at rejectedemojis.tumblr.com)04:27
aps-sidsmithro: I don't think it should be "dvswtich name=src %s" since the name of element itself is dvswitchsrc and dvswitch will not be found by gstreamer04:32
mithroaps-sids: name=src allows you to use pipeline.get_by_name("src") to get that element - currently it doesn't have a name04:33
mithroaps-sids: take a look at some of the other producers04:33
aps-sidsmithro: "dvswtich name=src %s" gives    --  no element "dvswitch"04:35
aps-sids"dvswtichsrc name=src %s" gives  same error as in blog04:35
mithro"dvswitchsrc name=src %s"04:35
mithroaps-sids: yeah, as I said that is probbaly unrelated04:35
aps-sidsokay04:36
mithroaps-sids: so you want to look at class ParseLaunchComponent(FeedComponent):04:36
mithroin flumotion/component/feedcomponent.py04:36
mithroaps-sids: that is what creates the elements that it is trying to get the name for04:37
mithroaps-sids: btw what is the actual name it is failing to get?04:37
mithroIE what is feeder.elementName ?04:37
aps-sidsmithro: 'feeder:dv'04:38
mithrookay, that is a bit weird...04:38
aps-sidsmithro: can you tell me where is self.feeders.values() coming from?04:39
aps-sids[<Feeder dv (0 client(s))>, <Feeder audio (0 client(s))>, <Feeder video (0 client(s))>]04:39
mithrooh I see now04:40
aps-sidsmithro: pipeline.get_by_name works for audio and video04:40
mithroTake a look at04:40
mithrohttps://github.com/aps-sids/flumotion-orig/blob/9fa3fdb39b8b7ef79d0571f91d719337e362c281/flumotion/component/producers/dvswitch/dvswitch.xml04:40
tpbTitle: flumotion-orig/flumotion/component/producers/dvswitch/dvswitch.xml at 9fa3fdb39b8b7ef79d0571f91d719337e362c281 · aps-sids/flumotion-orig · GitHub (at github.com)04:40
aps-sidsmithro: Okay, so that's where it comes from. But why pipeline.get_by_name() can't find it? I does for unported flumotion right?04:42
mithroithe pipeline template at L100 needs a "@feeder:dv@" in there somewhere04:42
mithrosee how there is a @feeder:audio@04:42
mithroI think you probably want something like the following04:43
mithrohttps://www.irccloud.com/pastebin/5QagMi6E04:43
tpbTitle: Pastebin: 5QagMi6E | IRCCloud (at www.irccloud.com)04:44
aps-sidsmithro: I see. My concern is how did it work without this till now?04:44
mithroaps-sids: I have no idea :P04:44
aps-sidsFair enough.04:44
mithroaps-sids: maybe we have always had that error and I just never paid any attention to it?04:45
mithroaps-sids: maybe there is a fix in another branch?04:46
mithroaps-sids: take a look at flumotion/component/producers/firewire/firewire.py04:46
mithroaps-sids: maybe you fixed something else that had always been broken which showed up this issue :P04:48
aps-sidshaha, yeah04:48
aps-sidsmithro: there is a  '    t. ! queue ! @feeder:dv@' in firewire.py04:48
mithroaps-sids: yeah04:49
mithrodunno why/how I removed it, because dvswitchsrc is almost a direct copy from firewire.py04:49
mithroaps-sids: btw you can see all the branches in our flumotion repo at https://github.com/timvideos/flumotion/network04:52
tpbTitle: Network Graph · timvideos/flumotion · GitHub (at github.com)04:52
mithroaps-sids: it looks like you forked from the "everything" branch which is missing a couple of small commits on master?04:54
aps-sidsmithro: I forked from master04:55
mithroaps-sids: also looks like someone named yoe did some hacking too?04:55
mithroaps-sids: oh wait, that was bannadine's attempt not yours04:56
mithroall these branches are a bit confusing04:56
mithrowe really should clean it all up04:56
aps-sidsmithro: okay   "No feeder feeder:dv in pipeline" problem is fixed04:57
aps-sidsArgument 1 does not allow None as a value still remains. Log is not even showing which argument 1 this.04:58
aps-sidsTime to dive into ipython04:58
mithroaps-sids: btw did you ever look at the "q" module?05:00
mithroaps-sids: good luck!05:00
aps-sidsmithro: yeah I did, Ipython is better than q (it has tab autocompletion, so I can see what all fields the object has)05:00
shenkimithro: Xilinx_ISE_DS_Lin_14.7_1015_1.tar05:09
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aps-sidsmithro: Found the problem, now I need to change this line  --  https://github.com/aps-sids/flumotion-orig/blob/porting-to-gst1.0/flumotion/component/effects/deinterlace/deinterlace.py#L12005:59
aps-sidsset_setcaps_function() has been removed in gst 1.0 and we need to use  GST_EVENT_CAPS in event handler. I don't quite understand how to do that05:59
tpbTitle: flumotion-orig/flumotion/component/effects/deinterlace/deinterlace.py at porting-to-gst1.0 · aps-sids/flumotion-orig · GitHub (at github.com)05:59
mithroaps-sids: didn't you do something like this previously?06:00
aps-sidsI forgot :/06:00
aps-sidsmithro: someone on #gstreamer said, "in your pad event handler, call the function you would pass to the set_setcaps_function when the caps event arrives"06:00
mithroaps-sids: look through your blog posts?06:00
mithroaps-sids: yes that sounds about right06:00
aps-sidsmithro: what is the pad event handler in https://github.com/aps-sids/flumotion-orig/blob/porting-to-gst1.0/flumotion/component/effects/deinterlace/deinterlace.py ?06:01
tpbTitle: flumotion-orig/flumotion/component/effects/deinterlace/deinterlace.py at porting-to-gst1.0 · aps-sids/flumotion-orig · GitHub (at github.com)06:01
mithroaps-sids: no idea06:05
aps-sidsmithro: I think I recall now06:05
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mithromorning rohitksingh07:00
mithrorohitksingh: I see you've seen our PCB feedback? :P07:00
rohitksinghmithro: Morning! :)07:00
mithroI'm sitting just opposite shenki07:01
rohitksinghmithro: Yep. Saw them. Lots of issues. May be complete re-routing! BTW how do I do length-matching?07:01
mithrorohitksingh: painfully :/07:01
mithrorohitksingh: sadly KiCad can't do it automatically for you07:01
rohitksinghmithro: Okay! :/ Will see how others do it in KiCad07:03
rohitksinghmithro: VC?07:05
mithroyes, just a moment07:05
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shenkirohitksingh: im a KiCad noob, i was trying to figure out what was going on with your text layers07:08
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shenkirohitksingh: i tried exporting gerbers and reading those; from what I could see you have lots of really small text under the passive components07:09
shenkithat probably won't be readable07:09
shenkiand/or it will be over the pads07:09
mithroshenki: hrm it just quit07:10
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rohitksinghSorry about that. Problematic Net. I'm back07:11
mithrorohitksingh: okay, meeting07:11
rohitksinghgreat!07:11
mithrorohitksingh: waiting? Normal VC room...07:14
rohitksinghmithro: Is the link working? Its says "This party is over..."07:14
rohitksinghshenki: From the logs, i see i missed your recent messages07:14
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mithrorohitksingh: having connection issues?07:35
rohitksinghmithro: Sorry! Lost connection. Trying again.07:35
mithrorohitksingh: https://github.com/rohit91/HDMI2USB-vmodvga/issues/207:38
tpbTitle: GSoC_Designs directory shouldnt exist · Issue #2 · rohit91/HDMI2USB-vmodvga · GitHub (at github.com)07:38
rohitksinghmithro: What does this mean here? https://docs.google.com/document/d/1p6FH25ltGpzJQ5_8fbflDukqEKghiEcpuhJpngth2Is/edit07:50
tpbTitle: Hackvana PCB Q - Google Docs (at docs.google.com)07:50
rohitksinghUpdated 9th July "I'm no longer taking orders for rush jobs07:51
mithrorohitksingh: don't worry about that part07:51
rohitksinghokay. I'm looking for their Design Rules07:52
mithrorohitksingh: I don't see minimum trace width07:54
rohitksinghmithro: Found it. Its at the end of Doc07:55
rohitksinghmithro: We need 4mils because we are using ~4.9mils (0.125mm) track width for VHDCI07:56
mithrorohitksingh: okay07:56
mithrorohitksingh: we should ask hackvana about that07:56
rohitksinghmithro: But, that would come under special order, which as per their definition is for large orders :/  Better I should ask them07:57
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aps-sidsslomo: around?09:40
slomoaps-sids: yes09:43
aps-sidsslomo: I need to change this line -- https://github.com/aps-sids/flumotion-orig/blob/porting-to-gst1.0/flumotion/component/effects/deinterlace/deinterlace.py#L12009:43
aps-sidsset_setcaps_function() has been removed in gst 1.0 and we need to use GST_EVENT_CAPS in event handler. I don't quite understand how to do that09:43
tpbTitle: flumotion-orig/flumotion/component/effects/deinterlace/deinterlace.py at porting-to-gst1.0 · aps-sids/flumotion-orig · GitHub (at github.com)09:43
slomoaps-sids: works basically the same, just that you get a CAPS event and can extract the caps from that event09:43
slomootherwise all the same09:43
aps-sidsslomo: can you tell me what to write exactly. I'm out of ideas :/09:44
aps-sidsan example of some sort?09:45
slomogst_event_parse_caps() in C09:45
aps-sidsslomo: how to get the event?09:48
slomoit's passed to you in the event handler09:48
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tijashenki: got debug output out of cdc10:01
tijashould I make another debug program or develop on the same10:02
aps-sidsslomo:    I'm getting this error --10:03
aps-sidsGstGDPPay:feeder:dv-pay error The stream is in the wrong format. gstgdppay.c(620): gst_gdp_pay_chain (): /GstPipeline:pipeline-producer-audio-video/GstGDPPay:feeder:dv-pay:10:03
aps-sidsfirst received buffer does not have caps set10:03
aps-sidsDoes this mean I'm not setting caps correctly?10:03
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aps-sidsmithro: still no luck :( The components setup properly but I get  "Error: first received buffer does not have caps set"10:30
aps-sidsmithro: and I have no idea what is going on10:30
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shenkitija: nice10:32
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rohitksinghmithro: ping11:03
rohitksinghmithro: Do you want this design? https://github.com/rohit91/HDMI2USB-vmodvga/tree/gsoc/PCB/RoughWorks11:05
tpbTitle: HDMI2USB-vmodvga/PCB/RoughWorks at gsoc · rohit91/HDMI2USB-vmodvga · GitHub (at github.com)11:05
rohitksinghmithro: Isn't there any chance that we can have this layout? https://docs.google.com/drawings/d/1Q8SRjYLjhRFQtuQP0uSEUU5B_FltX_Y2pVN5fQyM6CE/edit?usp=sharing11:06
tpbTitle: VGA Capture Mechanical Specification - Google Zeichnungen (at docs.google.com)11:06
rohitksinghmithro: My reasons are that in your proposed layout all the important traces (Analog RGB, HSYNC and VSYNC) are going to be very long. The datasheet warns that we should emphasize to reduce these traces as they pick up noises. The digital ones are not that critical but theses ones are. Whereas in layout in above drawing, the traces are comparatively very shorter in length.11:10
mithrorohitksingh: pong11:14
mithrorohitksingh: the problem with that layout is the edge the connectors are on11:16
mithrorohitksingh: can you move the AD chip downwards?11:17
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mithro8:44 PM <mithro> rohitksingh: pong11:23
mithro8:46 PM <mithro> rohitksingh: the problem with that layout is the edge the connectors are on11:23
mithro8:47 PM <mithro> rohitksingh: can you move the AD chip downwards?11:23
rohitksinghmithro: ?11:24
rohitksinghMoving the chip downwards will increase length of all digital lines. Maybe colors lines won't be affected much but DATACK, HSOUT, VSOUT and SOGOUT might be11:24
mithrorohitksingh: what type of length are we talking?11:24
rohitksinghtrace lengths...extra increase in lengths by about 40-45mm11:25
rohitksinghor lower at aorund 30-35mm11:26
rohitksinghmithro: For digital lines datasheet says "Try to minimize the trace length that the digital outputs have to drive. Longer traces have higher capacitance and require more instantaneous current to drive, which creates more internal digital noise. Shorter traces reduce the possibility of reflections."11:28
mithrorohitksingh: yes correct11:28
mithrorohitksingh: everything is a trade off :)11:29
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mithrotija: you should extend your current program to support both modes11:30
tijamithro: okay11:30
rohitksinghmithro: So what do you recommend. Should I move ahead with your layout with some trade-offs? or go with my layout?11:32
mithrorohitksingh: I think we should drop them into the pcb and have a look at it11:32
rohitksinghmithro: great. I will start routing with your layout. Lets see how it comes out!11:34
mithrorohitksingh: lets do placement and then commit it and let me take a look11:52
rohitksinghmithro: ok...in 15 minutes11:53
rohitksinghmithro: how does the placement look like now?12:03
mithrorohitksingh: that layout looks pretty good12:07
rohitksinghmithro: okay then! I'm moving ahead with its routing! :)12:09
mithrorohitksingh: don't forget to line up the connectors properly12:10
rohitksinghmithro: yeah. This was just a hurried placement. Will align them properly (Although exact alignment is very difficult with coordinates, newer KiCad development version has alignment, P&S Router as well as length-matching)12:12
mithrorohitksingh: yeah no worries12:20
mithrorohitksingh: you chatted with hackvana about the trace issue?12:31
rohitksinghmithro: not yet12:31
mithrorohitksingh: he's in the same timezone as me I believe12:34
mithroso it's probably good to do that sooner rather than later12:34
rohitksinghmithro: okay sure. Can you tell me whom to contact on the chatroom?12:36
mithrorohitksingh: hackvana :P12:36
rohitksinghMaybe I'm looking wrong but I can't find user named hackvana in this chatroom #hackvana. But I can see you there :D12:38
mithrorohitksingh: it might not be online at the moment12:48
rohitksinghmithro: Yeah. Just now got informed by Devilholk there that hackvana is not online12:52
mithrorohitksingh: yeah12:55
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rohitksinghmithro: a user named aiju informed that 4 mils can be done. He had got a quote with 4mils for $50 extra.13:07
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mithrorohitksingh: lets wait and see what hackvana says13:15
mithrorohitksingh: I'm pretty sure we can get 4mils done13:15
rohitksinghmithro: yeah. He has entered the room. Although, not yet responded to my query.13:16
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mithroshenki: have you tried running the compile stage in a loop and comparing the outputs?14:02
mithroshenki: I set build.hdmi2usb.tv building the firmware in a loop14:21
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CarlFKmithro: collector box for PyOhio this weekend. I might try to stream.  oneiric or precise ?18:01
CarlFKprecise is 10.04 lts.  I think that one.18:03
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mithroPrecise23:07
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