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mithro | ayush3504: ping? | 01:11 |
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ayush3504 | mithro:pong | 01:12 |
mithro | ayush3504: give me a moment and then we need to go through some stuff | 01:18 |
ayush3504 | mithro: sure | 01:27 |
mithro | ayush3504: okay, I'm around now - where are you at with everything? | 02:49 |
ayush3504 | mithro: a few remaining daughterboard schematics, need to explain a diagram and adding power calculation spreadsheet in requirements document | 02:51 |
ayush3504 | mithro: also PIC18 USB sheet needs some work | 02:51 |
ayush3504 | mithro: the bus pins method doesn't seem to work. See my reply in the github issue | 02:52 |
ayush3504 | mithro: need to know where the SPI pins go into the VHDCI with only two remaining pins | 02:53 |
mithro | ayush3504: the VHDCI pin mapping should be included in a spreadsheet somewhere? | 02:55 |
ayush3504 | mithro: yes, will do after all pins get decided, as of now it's easy to understand 6 x RX,TX,RTS,CTS,DTR,DSR + SDA, SCL - 38 pins | 02:56 |
ayush3504 | mithro: = | 02:56 |
mithro | ayush3504: sure, that information should be in the same spreadsheet I think | 02:57 |
ayush3504 | mithro: we have a spreadsheet for that already if you remember | 02:57 |
mithro | ayush3504: sure, which one? | 02:58 |
ayush3504 | mithro:sent | 02:59 |
ayush3504 | mithro: the Pin Usage sheet? | 02:59 |
mithro | The "Atlys Expansion Boards Information (using VHDCI connectors)" spreadsheet is really for after the design is published / finished | 03:01 |
mithro | It is a "documentation spreadsheet" rather than a "design spreadsheet" | 03:01 |
mithro | A design spreadsheet is suppose to make it easier for you to design your system | 03:04 |
ayush3504 | mithro: okay | 03:05 |
mithro | where is the motherboard mechanical spreadsheet again? | 03:06 |
ayush3504 | mithro: i'll make a separate. for now you can take a look at it, i have updated it. | 03:06 |
ayush3504 | mithro: https://docs.google.com/spreadsheets/d/1lOAKj-r80o0KVlB-AP-42tiUY0Hg50EkQTgRwYNMilk/edit#gid=2041047356 | 03:07 |
tpb | Title: Serial expansion board and daughterboard design - Google Tabellen (at docs.google.com) | 03:07 |
ayush3504 | mithro: brb power gone | 03:09 |
mithro | ayush3504: it looks like your BUS make up is totally foobar | 03:16 |
mithro | ayush3504: poke me when you are back | 03:55 |
ayush3504 | mithro: back | 04:13 |
mithro | ayush3504: this schematic still needs a bunch of work | 04:14 |
ayush3504 | mithro: for the daughterboards, you were looking at templates, only two were done | 04:15 |
mithro | Can you make sure you have pushed everything? | 04:16 |
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ayush3504 | mithro: bus thing wasn't working so i didn't push. that's why i sent photos | 04:17 |
ayush3504 | mithro: neither commited | 04:17 |
mithro | ayush3504: okay | 04:18 |
mithro | ayush3504: I think you should have a separate sheet which is shared between all the daughterboards for the "stand alone" parts (IE the input DB9 and the level shifter) | 04:19 |
ayush3504 | mithro:yes, except for GPIO8 and RS232 boards that have been done | 04:20 |
ayush3504 | mithro: also the IR | 04:20 |
mithro | ayush3504: so what should I be looking at then? | 04:20 |
ayush3504 | mithro: because most things are common i made a template | 04:20 |
ayush3504 | mithro: gpio8, rs232, IR | 04:20 |
ayush3504 | mithro: my commit history would tell you these things :) | 04:21 |
mithro | I'm looking at the GPIO-8 and not quite able to understand what is going on | 04:22 |
mithro | The EEPROM is on the GPIO-8 standalone sheet? | 04:23 |
ayush3504 | i have making a component so i can't check at the moment. but the EEPROM is on the main sheet | 04:24 |
ayush3504 | mithro: the standalone sheet can be imported as a hierarchical sheet in the motherboard schematic if a preloaded PCB is needed | 04:25 |
ayush3504 | mithro: sorry, eeprom is on standalone sheet | 04:26 |
ayush3504 | mithro: so if you use this sheet with motherboard schematic, it will be there, but you always have an option of not populating it on pcb | 04:26 |
mithro | The RS232C has two ISL83387E chips on it? Why | 04:26 |
ayush3504 | mithro: ah, didn't notice it doesn't make sense. will remove it.. It's useful for all other boards though | 04:27 |
ayush3504 | mithro: i mean the left chip | 04:27 |
mithro | ayush3504: so I think you need to reorganise all these daughterboards and make liberal use of symbolic links | 04:28 |
mithro | The EEPROM is the same for every daughterboard right? | 04:29 |
ayush3504 | mithro: yes | 04:29 |
mithro | create a "common" directory | 04:29 |
mithro | put the schematic for the EEPROM in it | 04:29 |
mithro | then symlink it into the other directories | 04:29 |
mithro | if that works, then you only need the sheet once | 04:30 |
mithro | do the same for the "input side" of the daughterboard | 04:30 |
ayush3504 | mithro: i did that for PIC16F GPIO, but it didn't look useful for eeprom | 04:30 |
ayush3504 | mithro: ok | 04:32 |
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aps-sids | mithro: CarlFK: I've not been able to fix the problem(s) with with overlay component and I have decided to port some other components first. Do we have any preferred components? | 06:44 |
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rohitksingh | mithro: online? | 13:48 |
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rohitksingh | mithro: online? | 19:04 |
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