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| -_whitenotifier-3- [prjxray] benglines opened issue #1658: parts.yaml file not found when running settings script for board family - https://git.io/J3ICf | 01:35 | |
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| -_whitenotifier-3- [nextpnr] acomodi opened issue #286: [Interchange] Clock routed through general interconnect - https://git.io/J3toN | 12:32 | |
| -_whitenotifier-3- [python-fpga-interchange] acomodi opened issue #75: Pseduo PIPs should have information on which site and bel pins they traverse - https://git.io/J3tPI | 12:46 | |
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| -_whitenotifier-3- [fpga-interchange-tests] mithro opened issue #10: Missing license headers - https://git.io/J3qvz | 14:16 | |
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| mithro | acomodi: I think I have setup kokoro on the fpga-interchange-tests repository | 15:32 |
|---|---|---|
| sf-slack1 | <acomodi> mithro: ok, I will open a test PR to see if it runs correctly | 15:32 |
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| -_whitenotifier-3- [python-fpga-interchange] acomodi opened issue #76: Wrong LUT equation when used as LUT-thru - https://git.io/J3qoY | 16:24 | |
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| -_whitenotifier-3- [fpga-interchange-tests] acomodi opened issue #14: Enable full round-trip testing - https://git.io/J3meW | 18:12 | |
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| tcal | gatecat: I'm running into errors trying to recompile prjoxide after updating. Is there a 'make clean' equivalent that I can run? | 20:08 |
| gatecat | tcal: deleting the 'target' directory in 'libprjoxide' should restore things to a clean state | 20:09 |
| tcal | thx! | 20:10 |
| tcal | gatecat: false alarm -- my issue was that I had a bad conda environment activated. Once I got out of that, it built without issue. | 20:25 |
| tcal | is Yosys expected to have deterministic output? (using synth_nexus, in case it matters) | 21:39 |
| tcal | ...hm, appears to be. | 21:47 |
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| Lofty | tcal: yes, nondeterminism is a bug | 23:55 |
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