Saturday, 2021-04-17

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sf-slack<cjearls> Is there a place to find yosys optimization strategies? I have a design that is taking up 160% of the logic slices in my orangecrab, and I was hoping to find some yosys settings to reduce the utilization enough that it'll fit01:24
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tntcjearls: That's not a optimization strategy you need, it's a miracle.08:45
Loftycjearls: you're running with -abc9 right?09:37
LoftyAlso consider -abc9 -dff09:37
tntI don't have that much faith in abc9 to go from 160% LC usage to something placable/routable.09:57
tntAt that point you need a whole new architecture for whatever you're doing.09:57
umarcoragree. pnr needs to be done. even 80-90% may be difficult to fit.10:10
Loftytnt: ABC9 and a more accurate delay target can do a *lot* to reduce area10:51
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tntHuh, I have never seen any such drastic area reduction on any real world design by using abc9. At most I think I've seen 10% LUT reduction which doesn't even translate to 10% LC reduction since a bunch would have been packed with an adjacent FF.11:21
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sf-slack<vastarparaakshar> Kintex-7 support is on the planning?12:28
Loftytnt: are you setting ABC9 delay targets or just passing "-abc9" and assuming the best?12:42
tntLofty: not sure what you mean ... I pretty much always run my designs however fast they'll go.12:54
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LoftyThat might be why you're experiencing not much in the way of area reduction13:11
LoftyTo people who have other constraints it can help a lot13:12
tntHow do you specify the target frequency ? synth_ecp5 doesn't have anything in help13:16
LoftyIt's not a target frequency but target delay in picoseconds, which you pass to -D13:37
Lofty(synth_ecp5 -D)13:38
LoftyI normally turn target frequency to picoseconds then halve it to account for interconnect delay13:38
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cjearlsLofty: I'm getting an unknown option error when running "synth_ecp5 -nowidelut -abc9 -dff -D 80000 -json gsd_orangecrab.json -top gsd_orangecrab" for the -D option, and I can't find it in the synth_ecp5 documentation17:10
LoftyAh, the joys of Yosys having different options for different flows17:11
Lofty*sigh*17:11
Lofty"scratchpad -set abc9.D 80000; synth_ecp5 -nowidelut -abc9 -dff -json gsd_orangecrab.json -top gsd_orangecrab"17:11
cjearlsAlright, it's synthesizing. Fingers crossed17:14
cjearlsLofty: Thanks for your help, I appreciate it17:15
LoftyI don't know if it can give you a design that *fits*, but perhaps it'll save you a bit of work17:22
cjearlsLofty: I'm getting an error "ERROR: Assert `cell->parameters.empty()' failed in passes/techmap/abc9_ops.cc:460.", is that a bug?17:24
LoftyAaah, this one again17:24
LoftySo it would seem, yes17:24
cjearlsSo that would be submitted as an issue to yosys?17:25
LoftySomebody else was meant to have submitted it17:25
cjearlsI don't see any issues related to the assert on that line or in that file on Github17:28
LoftyI know17:30
LoftyI'll go file it now17:31
cjearlsOh, ok. Do you need any information from me to file it? Sounds like it's a known bug17:31
Loftycjearls: It got reported to me personally by another person, so I reduced a testcase from that17:32
LoftyTemporary workaround: remove `-dff` from `synth_ecp5`17:32
cjearlsAlright, I'm rerunning17:34
cjearlsNo miracles today, we're down to 167% utilization17:45
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mithrocjearls: It is probably good to check that things like DSPs / blockrams / lutrams are being inferred correctly18:55
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cjearlsmithro: Ok, how would I go about doing that?20:40

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