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| -_whitenotifier-9- [sphinxcontrib-verilog-diagrams] daniellimws opened issue #17: LICENSE file contains Apache License 2.0 instead of ISC License - https://git.io/JfTwU | 01:29 | |
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| mkru | In VHDL package and entity can't have the same names. Do you know if it is the same with package and module in System Verilog? | 06:55 |
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| ZirconiumX | mkru: it's actually encouraged in Verilog | 09:57 |
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| -_whitenotifier-9- [sv-tests] tgorochowik opened issue #763: sv-report fails if test uses nonexistent source files - https://git.io/JfTh6 | 13:43 | |
| -_whitenotifier-9- [sv-tests] tgorochowik opened issue #764: The earlgrey test should scan for source files dynamically - https://git.io/JfThi | 13:44 | |
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| mithro | ZirconiumX: The docs you wrote on the Intel ALM were super interesting! | 17:41 |
| ZirconiumX | Thank you! | 17:42 |
| ZirconiumX | There's also the flop, if you missed it | 17:42 |
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| borisnotes | Hello everyone. I am very inspired with what this group is doing and I would like to be the part of it in some way. But I am not sure where does one start? Currently, I am an MSc embedded systems student, working primarily in C... and I speak English. : ) Most of the topics here are over my head, but mithro 's talks convinced me everyone can be | 21:47 |
| borisnotes | useful :D | 21:47 |
| borisnotes | I recently started playing with Verilog and FPGAs, and I would like to develop my skills in that area. | 21:47 |
| mithro | borisnotes: Have you ever used a Zynq board or Zephyr? | 21:47 |
| borisnotes | nope, out if the hardware at the moment I only have TinyFPGA Bx | 21:48 |
| mithro | borisnotes: Have you played with https://github.com/timvideos/litex-buildenv/wiki/HowTo-FuPy-on-iCE40-Boards | 21:49 |
| tpb | Title: HowTo FuPy on iCE40 Boards · timvideos/litex-buildenv Wiki · GitHub (at github.com) | 21:49 |
| mithro | borisnotes: You might want to join the #timvideos IRC channel and talk to ewen about the state of FuPy (MicroPython on FPGAs) | 21:49 |
| mithro | borisnotes: It would be awesome if we could get it so that on a TinyFPGA BX you could get the micropython console via the USB port (rather than needing an external USB<->Serial) adapter | 21:50 |
| mithro | borisnotes: This already works on the Fomu board, so it would hopefully just be a porting effort -- xobs might be able to help too | 21:50 |
| borisnotes | Oh, I literally started digging there yesterday. Ok, I'll switch to that channel. | 21:51 |
| mithro | borisnotes: the #tomu and #litex channels would be good to hang out on too | 21:56 |
| borisnotes | thanks! | 21:57 |
| mithro | borisnotes: If you start contributing you might also find that I end up sending you a Fomu board | 21:57 |
| borisnotes | oh that would be awesome... but let me first wrap my head around this : ) | 21:59 |
| mithro | I believe tcal may have recently gone through some of this stuff.... | 22:00 |
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| mithro | daniellimws: Want to try your hand at some code review? | 22:39 |
| -_whitenotifier-9- [sv-tests] wsnyder opened issue #770: Verilator tests broken recently - https://git.io/JfkWL | 22:54 | |
| -_whitenotifier-9- [sv-tests] mithro opened issue #771: Publish the history of the reports somewhere - https://git.io/JfkWs | 22:58 | |
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