Tuesday, 2020-04-14

« Monday, 2020-04-13 Index Wednesday, 2020-04-15 »
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sf-slack<timo.callahan> @mithro , I might need permission on foss-fpga-tools-kokoro in order to use the image "opt-xilinx--2018-01-10".   Or else I'm doing something else wrong.  @litghost , I'm trying "gcloud compute disks create tcal-xlnx-172-disk --image-project=foss-fpga-tools-kokoro --image=opt-xilinx--2018-01-10 --zone=us-central1-a", and I get an error "The project 'foss-fpga-tools-kokoro' was not found."06:15
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mithrotimo.callahan: I think the project is actually called foss-fpga-tools rather than foss-fpga-tools-kokoro due to hysterical raisins14:21
daniellimwsmithro: I see that the documentation for python-symbiflow-v2x looks incomplete, for example https://python-symbiflow-v2x.readthedocs.io/en/latest/tests/vtr/lutff-pair.html Are they meant to be just like that?14:30
tpbTitle: LUT with FlipFlop Example SymbiFlow Verilog to XML (V2X) 0.0-441-g4bc9809 documentation (at python-symbiflow-v2x.readthedocs.io)14:30
mithro@daniellimws It could use work14:34
daniellimwsI was reading about fasm https://symbiflow.readthedocs.io/projects/vtr/en/latest/utils/fasm.html . Am I right to say that fasm_mux does not generate a multiplexer in the HDL sense, like `o = s ? a : b`?  But is used to decide which connection to make when generating the bitstream instead? Because the documentation states that "From the perspective of genfasm, the <direct> and <mux> tags are equivalent." which was confusing to me.14:35
tpbTitle: FPGA Assembly (FASM) Output Support Verilog-to-Routing 8.0.0-dev documentation (at symbiflow.readthedocs.io)14:35
mithro@daniellimws https://python-symbiflow-v2x.readthedocs.io/en/latest/tests/clocks.html has some diagrams that should be included14:35
tpbTitle: Clock Examples SymbiFlow Verilog to XML (V2X) 0.0-441-g4bc9809 documentation (at python-symbiflow-v2x.readthedocs.io)14:35
mithrodaniellimws: There are two types of muxes in an FPGA, those which are controlled via the bitstream (called routing muxes) and those controlled via user signals (sometimes called BELs or Logic muxes)14:36
daniellimwsmithro: So routing muxes are never defined by the user? I saw some examples that used such muxes for registered ports (https://symbiflow.readthedocs.io/projects/vtr/en/latest/tutorials/arch/configurable_memory_bus.html)14:40
tpbTitle: Configurable Memory Bus-Based Tutorial Verilog-to-Routing 8.0.0-dev documentation (at symbiflow.readthedocs.io)14:40
mithroFFY00: If your into working on tooling, I found an old doc at https://docs.google.com/document/d/1tFdp3GdU8f89IQIZC19RgkHSgObbWXd17ZLcEiDVQxg/edit14:40
tpbTitle: Missing random SymbiFlow tooling - Google Docs (at docs.google.com)14:40
mithrodaniellimws: I'm not sure what you mean by "defined"?14:41
mithrodaniellimws: I found this old doc which was very much a WIP -> https://docs.google.com/document/d/1ngck6LGVTXm6HDrVqWeEGdEELrKPWXVaeejkXurgfl4/edit14:41
tpbTitle: SymbiFlow Parts Encyclopedia - Google Docs (at docs.google.com)14:41
daniellimwsmithro: Because to generate a logic mux, we can define it in verilog using the `o = s ? a : b` syntax right? But is there any such syntax for routing muxes?14:42
mithros would be a constant for a routing mux14:43
daniellimwsAh ok thanks, learning so many new things beyond hardware design from reading the VPR documentation/tutorials. Interesting stuff.14:46
daniellimwsmithro: For the missing parts in https://python-symbiflow-v2x.readthedocs.io/en/latest/tests/clocks.html should there also be verilog code? I think I can work on this14:48
tpbTitle: Clock Examples SymbiFlow Verilog to XML (V2X) 0.0-441-g4bc9809 documentation (at python-symbiflow-v2x.readthedocs.io)14:48
mithro@daniellimws Yeap, I think so! and auto-generated diagrams14:49
mithrodaniellimws: https://sphinxcontrib-verilog-diagrams.readthedocs.io/en/latest/14:49
tpbTitle: Sphinx Verilog Diagrams Sphinx Verilog 0.0-19-gdca0472 documentation (at sphinxcontrib-verilog-diagrams.readthedocs.io)14:49
daniellimwsWow this looks neat. By the way, shall we change to using the readthedocs theme instead of the material theme. The things feel out of place...14:50
mithrodaniellimws: Hrm? We use the martial design theme for all the symbiflow docs14:50
daniellimwsOh this doesn't count? https://symbiflow.readthedocs.io/projects/vtr/en/latest/tutorials/arch/timing_modeling/index.html14:51
tpbTitle: Primitive Block Timing Modeling Tutorial Verilog-to-Routing 8.0.0-dev documentation (at symbiflow.readthedocs.io)14:51
daniellimwsthe vpr docs14:51
mithro@daniellimws That looks like a bug, it should be rendered with the material design theme. Can you log an issue against https://github.com/SymbiFlow/symbiflow-docs repo?14:52
tpbTitle: GitHub - SymbiFlow/symbiflow-docs: Documentation for SymbiFlow (at github.com)14:52
mithro@daniellimws https://symbiflow.readthedocs.io/en/latest/vtr-verilog-to-routing/doc/src/tutorials/arch/timing_modeling/index.html#arch-model-timing-tutorial14:53
daniellimwsmithro: Do you want me to make a pull request instead? This would be faster?14:53
tpbTitle: Primitive Block Timing Modeling Tutorial SymbiFlow (at symbiflow.readthedocs.io)14:53
daniellimwsOh what happened14:53
mithro@daniellimws Dunno what is going on there, log a bug and Robert Winkler will track it down14:54
daniellimwsAlright14:54
-_whitenotifier-3- [symbiflow-docs] daniellimws opened issue #244: VPR documentation does not show up in material theme - https://git.io/JfeXF14:59
daniellimwsmithro: Shall I also add the license headers while I'm adding to the documentation?15:02
mithro@daniellimws Probably best to do that in a separate pull request?15:20
mithro@acomodi: You probably want to reload the document you are editing15:20
daniellimwsmithro: Oh yes definitely15:23
sf-slack<acomodi> @mithro Yep, thanks ;)15:24
mithrorw1nkler: You should have an invite to the SymbiFlow organization now15:34
sf-slack<rwinkler> @mithro, yes I have! Thanks15:36
mithrorwinkler: i can assign you bugs if you accept :-P15:37
sf-slack<timo.callahan> @mithro yes that was the issue -- foss-fpga-tools is the actual project.   I was able to create the disk now.15:37
daniellimwsmithro: Should I also add the license headers to the verilog .sim.v sources in the v2x repo?15:38
sf-slack<rwinkler> Oh, so it's too late... I've already accepted ;P15:38
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mithro@daniellimws Fast work :-P17:03
daniellimws:D17:03
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daniellimwsmithro: It seems that some modules in the tests do not have golden.pb_type.xml (such as https://github.com/SymbiFlow/python-symbiflow-v2x/tree/master/tests/clocks/dff_comb_one_clock) Are they left out because they are trivial enough?17:24
tpbTitle: python-symbiflow-v2x/tests/clocks/dff_comb_one_clock at master · SymbiFlow/python-symbiflow-v2x · GitHub (at github.com)17:24
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mithrodaniellimws: Maybe they haven't been finished? :-P17:29
daniellimwsmithro: Haha then shall I add them as I update the docs?17:29
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mithrodaniellimws: Log issues first17:31
mithrodaniellimws: mkurc and kgugala might be able to give more info too17:32
mithrodaniellimws: git blame might be useful17:32
daniellimwsOk sure thing17:35
-_whitenotifier-3- [python-symbiflow-v2x] daniellimws opened issue #40: Missing golden.pb_type.xml in some test cases - https://git.io/JfeQL17:39
mithroFFY00: FYI - I'm trying to document the status of the "SymbiFlow Flows" in this doc currently -> https://docs.google.com/document/d/1Q8vaqD67aqPO7JbSDZtVvbg4BD7XBVuA_JJTwcYHprk/edit#heading=h.3wym5vue0am117:46
tpbTitle: SymbiFlow Flows Status - Google Docs (at docs.google.com)17:46
FFY00okay17:47
mithroFFY00: Also -> https://docs.google.com/document/d/1JVWkXxeSanAna8IRt0I49sG4aFS3Unlq693-HsQ0B0U/edit#heading=h.20tjcdx08r5318:00
tpbTitle: SymbiFlow process for managing branches on non-SymbiFlow owned projects (and how to merge) - Google Docs (at docs.google.com)18:00
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mithrohttps://docs.google.com/drawings/d/1-FmukrW4YtreRwkA4JKkYd-siscC3OvDTq8rKreOVHE/edit18:35
tpbTitle: Data Flow in SymbiFlow Arch Defs for Xilinx Series 7 Testing + Verification - Google Drawings (at docs.google.com)18:35
mithrohttps://docs.google.com/document/d/11wJUvr2aVBkUiuYYsFN07jkoYr_ccWlLLLFH8YQw8uQ/edit#heading=h.uuw1jptahpuu18:35
tpbTitle: SymbiFlow Checking / Testing Approach - Google Docs (at docs.google.com)18:35
mithrohttps://docs.google.com/document/d/1SLRMCTETNKA0Cfy8dExF8QAn8j0FVbUEgorsicJmoeU/edit#heading=h.qrf56mrpgv1b18:35
tpbTitle: Types of "testing" in LiteX (and Migen/MiSoC) - Google Docs (at docs.google.com)18:35
mithrohttps://docs.google.com/drawings/d/1NJlN-cPLNx4nULHiL4938RD-H14izpayqtNSQ4XRjfA/edit18:36
tpbTitle: SymbiFlow Bitstream Verification Process - Google Drawings (at docs.google.com)18:36
mithroFFY00: I figured out how to test multiple Linux on Travis with https://github.com/google/verible/blob/master/.travis.yml19:11
tpbTitle: verible/.travis.yml at master · google/verible · GitHub (at github.com)19:11
mithrohttps://github.com/SymbiFlow/symbiflow-arch-defs/pulls?q=is%3Apr+is%3Aopen+install19:11
tpbTitle: Pull Requests · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)19:11
mithrodaniellimws: You missed some files for the SPDX (mostly python)19:16
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mithroFFY00: We build horrible static binaries for Verible and then test them on multiple OSs using the travis configation here -> https://github.com/google/verible/blob/master/.travis.yml20:08
tpbTitle: verible/.travis.yml at master · google/verible · GitHub (at github.com)20:08
FFY00okay20:09
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mithroFFY00: Have you seen https://docs.google.com/document/d/1DWZ0G8vehkuZTPs5N3AQqIvZZtLMGzC8i0MWPRP54O4/edit before?20:46
tpbTitle: Open Source (FOSS) FPGA (EDA) Tooling Interchange Formats + Toolchain parts - Google Docs (at docs.google.com)20:46
FFY00no20:46
FFY00mithro, what do you think of using circleci? since it has native support for docker20:50
mithroFFY00: That was an attempt to document the "flow ecosystem"20:51
FFY00travis is a pain since have to make a script and then run it inside docker20:51
mithroFFY00: I have a bigger one for ASIC tooling -- https://docs.google.com/document/d/1p-EJaC5kKgRahqcAxvEcEOVaIsi_ZObbBnwHjdaqSjc/edit#heading=h.qq7cizdf7hl220:51
tpbTitle: Open ASIC EDA Tooling Random Diagrams - Google Docs (at docs.google.com)20:51
FFY00maybe it's worth to put all this files in a shared google drive folder20:52
mithroFFY00: like this one? https://drive.google.com/drive/u/0/folders/1euSrrszzt3Bfz792S6Ud8Ox2w7TYUZNa20:53
tpbTitle: SymbiFlow - Publically Accessible Docs – Google Drive (at drive.google.com)20:53
FFY00yes20:53
FFY00didn't have that link :)20:53
mithroFFY00: Are somewhat trying to wean myself off the GDocs habbit20:54
FFY00yeah20:54
mithro100% unsuccessfully however :-)20:54
FFY00they are super useful20:54
FFY00mithro, would it be fine to user circleci instead of travis20:56
FFY00don't know if you missed my message above20:57
mithroTravis is the preferred tool20:57
mithroConsistency is good :-)20:57
FFY00yes, but travis is missing native docker support20:57
FFY00which makes things a bit clunky20:57
FFY00since I will have to maintain a script outside .travis.yml to do things20:58
mithroFFY00: It's pretty common to have .travis.yml set up some stuff and then call a script a normal user would call (In fact that is probably the preferred way)20:58
FFY00see the circle example here: https://circleci.com/docs/2.0/circleci-images/20:59
tpbTitle: Pre-Built CircleCI Docker Images - CircleCI (at circleci.com)20:59
mithrohttps://docs.travis-ci.com/user/docker/20:59
tpbTitle: Using Docker in Builds - Travis CI (at docs.travis-ci.com)20:59
mithroFFY00: I would say that Google Cloud Build would be the best option if you are thinking about something with more "docker native" support -- as we have a large amount of free resources there21:02
FFY00that works for me21:03
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FFY00are you fine using it or do want travis?21:13
mithroI prefer travis, but would take cloud build21:14
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