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| -_whitenotifier-3- [yosys] rakeshm75 opened issue #65: Branch: Quicklogic : Multiplier primitive instance should be qlal4s3_mult_cell_macro - https://git.io/JvDbe | 05:50 | |
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| clay_1 | Good morning people | 08:41 |
|---|---|---|
| clay_1 | is there any formal way to cite symbiflow and xray ? | 08:42 |
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| KaBoom25 | Hi | 08:47 |
| KaBoom25 | Anyone active? | 08:47 |
| clay_1 | hey | 08:47 |
| KaBoom25 | First time here... | 08:47 |
| clay_1 | wellcome :) | 08:48 |
| KaBoom25 | Anyone into ASIC? | 08:51 |
| clay_1 | I believe it is out of scope here but I am very new myself so dont take my word for it | 08:52 |
| KaBoom25 | Oh | 08:54 |
| KaBoom25 | I was asking because, I am looking for an open source synthesis tool | 08:54 |
| KaBoom25 | Any ideas? | 08:54 |
| clay_1 | Sorry I dont | 08:55 |
| sf-slack | <eddy.gta17> You may use qflow at opencircuitdesign.com | 08:55 |
| sf-slack | <eddy.gta17> Also there was the asicone, but you may have to contact the owners to access it. | 08:56 |
| sf-slack | <eddy.gta17> Then the DARPA sponsored openROAD project. | 08:56 |
| sf-slack | <eddy.gta17> It is FPGA that has fewer open source tools. | 08:57 |
| KaBoom25 | I can agree to that | 08:58 |
| KaBoom25 | Thanks foe=r the suggestions | 08:58 |
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| -_whitenotifier-3- [ideas] drom opened issue #43: Streaming VCD parser - https://git.io/JvyCy | 18:04 | |
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| -_whitenotifier-3- [ideas] drom opened issue #44: SystemVerilog parser using Tree-Sitter - https://git.io/JvyCb | 18:23 | |
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