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| -_whitenotifier-3- [sv-tests] alainmarcel opened issue #580: BlackParrot Verilog vs SystemVerilog files - https://git.io/JvLpG | 01:33 | |
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| mithro | hackerfoo: What does high_fanout_threadhold actually do? | 03:51 |
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| hackerfoo | mithro: It's the fanout threshold where this function is used instead of `timing_driven_route_connection_from_route_tree`: https://github.com/verilog-to-routing/vtr-verilog-to-routing/blob/master/vpr/src/route/route_timing.cpp#L1386-L1450 | 04:39 |
| tpb | Title: vtr-verilog-to-routing/route_timing.cpp at master · verilog-to-routing/vtr-verilog-to-routing · GitHub (at github.com) | 04:39 |
| hackerfoo | "Unlike timing_driven_route_connection_from_route_tree(), only part of the route tree which is spatially close to the sink is added to the heap." | 04:40 |
| hackerfoo | If the criticality is also above 0.9 | 04:42 |
| hackerfoo | I should probably set a breakpoint to make sure this code is actually being used. | 04:43 |
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| sf-slack1 | <tmichalak> mithro: I was thinking about how to color the resource usage in a dcp derived from a fasm2bels design | 11:00 |
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| sf-slack1 | <tmichalak> mithro: Since what we get currently is already too late because we only see sites` names without any suggestions what they might belong to I guess the only way is to do some preprocessing, preferably at Yosys stage | 11:02 |
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| sf-slack1 | <tmichalak> mithro: maybe add a COLOR attribute to each cell and making sure that lands in the eblif which can be later on processed by fasm2bels and assign the color to the decoded part | 11:05 |
| sf-slack1 | <tmichalak> mithro: and eventually call highlight_objects in the vivado tcl script | 11:06 |
| sf-slack1 | <tmichalak> I am not sure though whether fasm2bels can easily do the processing/assignment and how much overhead this will add | 11:09 |
| sf-slack1 | <acomodi> I think it is a good idea actually, and it could greatly help debugging implemented designs. Where would the color attribute be defined? | 11:12 |
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| sf-slack1 | <tmichalak> It could be a done with a command added with a plugin | 11:18 |
| sf-slack1 | <tmichalak> That would take a parent module name and color and assign it to all child cells | 11:20 |
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| sf-slack1 | <acomodi> litghost: regarding RAM32X1S, I believe that, even though the configuration obtained with symbiflow works on HW (meaning that we can have 8 of them in a single slice), is actually not supported in vivado | 12:06 |
| sf-slack1 | <acomodi> This is written regarding RAM32X1S template: `// RAM32X1S: 32 x 1 posedge write distributed (LUT) RAM (Mapped to a SliceM LUT6)` | 12:07 |
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| -_whitenotifier-3- [symbiflow-arch-defs] acomodi opened issue #1274: ReadTheDocs CI target randomly failing - https://git.io/Jvtsv | 12:15 | |
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| -_whitenotifier-3- [symbiflow-arch-defs] litghost opened issue #1275: [xc7] 128-bit and 256-bit LUT-RAM vendor tests are disabled - https://git.io/Jvt4N | 17:30 | |
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| mithro | acomodi: https://github.com/SymbiFlow/prjxray/pull/1205 | 19:04 |
| tpb | Title: kokoro: Behave better on large diffs. by mithro · Pull Request #1205 · SymbiFlow/prjxray · GitHub (at github.com) | 19:04 |
| sf-slack1 | <acomodi> mithro: great, as soon as it lands I'll revert the last commit | 19:08 |
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| -_whitenotifier-3- [sv-tests] jwagen opened issue #581: Add tool using ANTLR syntax - https://git.io/Jvtg6 | 22:10 | |
| hackerfoo | I have verified that the high fanout code is being called successfully; it does it's job 2881 times for picosoc. | 22:37 |
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| hackerfoo | This feature seems to consume a ridiculous amount of memory, maxing out my 128GB machine, and using up about the same in swap. | 23:13 |
| hackerfoo | Or maybe it's because I used `make -j all_xc7`. | 23:15 |
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| litghost | If you are using VPR with the XML rr graph reader, then each instance uses around 7 GB | 23:17 |
| hackerfoo | Yeah, that would do it. | 23:20 |
| hackerfoo | Maybe we should get a RAM manufacturer to support us, so they can sell more RAM. | 23:23 |
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