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| tmahlburg | Hi everyone, I just wanted to introduce myself. I'm Till Mahlburg and I'm working on simulating the Xilinx 7-Series PLL: https://github.com/ti-leipzig/sim-x-pll | 14:17 |
|---|---|---|
| tpb | Title: GitHub - ti-leipzig/sim-x-pll: Verilog based simulation modell for 7 Series PLL (at github.com) | 14:17 |
| tmahlburg | If you have any questions or suggestions feel free to ask me, open an issue or a pull request! | 14:17 |
| az0re | Hi, Till! | 14:57 |
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