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| hackerfoo | Oddly, only the unbonded IO pads are present in the arch.xml. | 00:52 |
|---|---|---|
| hackerfoo | Ah, they are probably being removed since they are in synth_tiles.json. | 01:03 |
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| hackerfoo | Here's the latest error: | 02:34 |
| * hackerfoo sent a long message: < http://sandbox.hackerfoo.com:8008/_matrix/media/v1/download/sandbox.hackerfoo.com/hSJPMzfczKCfCZnmQFvltzmE > | 02:34 | |
| hackerfoo | So VPR can't route from the IOB IBUF to a LUT. | 02:35 |
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| litghost | hackerfoo: It would be good to trace the routing path from the IOB and find where the "break" is located | 16:37 |
| litghost | xc7/utils/prjxray_find_inode.py is wire string -> inode / connection db and xc7/utils/prjxray_lookup_inode.py provide inode -> wire string / connection db | 16:39 |
| sf-slack2 | <kgugala> @mithro this commit adds techmap generation for routing muxes https://github.com/SymbiFlow/symbiflow-arch-defs/pull/703/commits/7b6c9f89036582b5e147977954fcf7ecb7307c38 | 16:48 |
| tpb | Title: mux_gen + v2x: Support generating FASM annotations for muxes. by mithro · Pull Request #703 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 16:48 |
| sf-slack2 | <kgugala> here is an example of generated tech map https://pastebin.com/niu3vnkm | 16:49 |
| litghost | In addition, route_diag tool can attempt to route from any inode to any other inode | 16:49 |
| tpb | Title: mux-techmap - Pastebin.com (at pastebin.com) | 16:49 |
| litghost | hackerfoo: So make sure VPR can route from the wire after the IOI tile to the inode in question | 16:49 |
| litghost | hackerfoo: If that works, then route from the IOB inode to the IOI wire | 16:49 |
| litghost | hackerfoo: The problem is either IOB pb_type -> IOI wire, or IOI wire to general fabric | 16:50 |
| hackerfoo | litghost: Okay, thanks | 16:51 |
| sf-slack2 | <mkurc> hackerfoo: Are you importing ILOGIC site along with IOI3 tiles? I'm asking as there is no direct route from IOB to the fabric. You have to route through the ILOGIC site. | 16:56 |
| hackerfoo | mkurc: Yes | 16:57 |
| sf-slack2 | <mkurc> Ok | 16:57 |
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| sf-slack2 | <kejace> I tried replicating this for the arty. I'm now getting a similar error | 18:08 |
| sf-slack2 | <kejace> And on a second attempt ```PYTHONPATH=../symbiflow-arch-defs/utils python3 ../symbiflow-arch-defs/xc7/utils/prjxray_create_ioplace.py --pcf basys3.pcf --map ../symbiflow-arch-defs/build/xc7/archs/artix7/devices/xc7a50t-arty-roi-virt/synth_tiles_pinmap.csv --blif counter.eblif --out counter_io.place PCF constraint "set_io clk W5" from line 2 constraints pad W5 which is not in available pad map: A9 C2 D10 E3 GND T10 VCC | 18:08 |
| sf-slack2 | Makefile:85: recipe for target 'counter_io.place' failed make: *** [counter_io.place] Error 1 rm counter_io.place``` | 18:08 |
| sf-slack2 | <kejace> It is clear that this is from me attempting to use the `basys3.pcf` | 18:08 |
| sf-slack2 | <kejace> Is the solution to this to create an accompanying `arty.pcf`? | 18:09 |
| sf-slack2 | <kejace> | 18:13 |
| litghost | Ya | 18:41 |
| litghost | Example: https://github.com/SymbiFlow/symbiflow-arch-defs/blob/master/xc7/tests/counter/arty.pcf | 18:43 |
| tpb | Title: symbiflow-arch-defs/arty.pcf at master · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 18:43 |
| mithro | FYI - I'm at the hardware hacking village at CCCamp19 right now! | 18:56 |
| mithro | kgugala: I don't understand https://github.com/SymbiFlow/vtr-verilog-to-routing/issues/250 | 19:01 |
| tpb | Title: VTR cannot handle clustering of multiple atoms of the same type · Issue #250 · SymbiFlow/vtr-verilog-to-routing · GitHub (at github.com) | 19:01 |
| sf-slack2 | <kgugala> @mithro I updated the #250 issue on github | 19:15 |
| sf-slack2 | <kejace> @litghost thanks, I got it to compile and build this way and although all of the LEDs light up and they don't blink, I think that I can work on a ClaSH example from here on | 20:05 |
| litghost | kejace: You might want to start with a sanity check example, e.g. buttons (tie sw[0] to led[0], etc) | 20:05 |
| litghost | kejace: I've mostly been testing on basys3 because it has more LED's and buttons, so it possible that something is wrong with the arty flow | 20:06 |
| litghost | kejace: But in theory it should work | 20:06 |
| sf-slack2 | <kejace> Got it, I'll try to make a complete `.pcf` for the arty. I'll model it after this: https://github.com/Digilent/vivado-boards/blob/master/new/board_files/arty-a7-35/E.0/part0_pins.xml | 20:08 |
| tpb | Title: vivado-boards/part0_pins.xml at master · Digilent/vivado-boards · GitHub (at github.com) | 20:08 |
| litghost | kejace: I would start with just the 4 switches and 4 LEDs, and go from there. The ROI harness in use on the Arty is fairly limited | 20:21 |
| mithro | kejace: Are you at CCCamp19? | 20:56 |
| sf-slack2 | <kejace> Hehe, I wish, I just heard about it now. I'm in NYC | 20:59 |
| hackerfoo | [dusty@hank:~/src/symbiflow-arch-defs/build/xc7/archs/artix7/devices]$ python3 ${SF_ROOT}/xc7/utils/prjxray_lookup_inode.py --rrgraph_node_map rr_graph_xc7a50t-basys3-x1y0_test.rr_graph.real.xml.node_map.pickle --connection_database xc7a50t-basys3-x1y0-roi-virt/channels.db --inode 247988 | 21:18 |
| hackerfoo | Traceback (most recent call last): | 21:18 |
| hackerfoo | ...(truncated) | 21:18 |
| hackerfoo | litghost: Also for the other key, so neither RR node is in the map. | 21:19 |
| litghost | hackerfoo: The map only has IPIN/CHANX/CHANY/OPIN | 21:20 |
| litghost | hackerfoo: Not SINK/SOURCE | 21:20 |
| litghost | hackerfoo: And the error prints SINK/SOURCE | 21:20 |
| hackerfoo | Can I look those up somewhere? | 21:20 |
| litghost | hackerfoo: You can grep the rrgraph to walk from SINK to an IPIN (and SOURCE to OPIN) | 21:20 |
| hackerfoo | Okay | 21:20 |
| litghost | hackerfoo: The rrgraph by default has no whitespace, I use "xmllint --format in.xml > out.xml" to aid grepping | 21:34 |
| hackerfoo | Thanks. I was trying to find a way to do something like that. | 21:35 |
| sf-slack2 | <kejace> I'm navigating the Makefile to understand why the pinmap is so small ```web-scale ➜ symbiflow-simple-sample git:(master) ✗ cat ../symbiflow-arch-defs/build/xc7/archs/artix7/devices/xc7a50t-arty-roi-virt/synth_tiles_pinmap.csv name,x,y,z,is_clock,is_input,is_output E3,42,26,0,1,1,0 C2,79,24,0,0,1,0 A9,9,49,0,0,1,0 T10,9,5,0,0,0,1 D10,9,3,0,0,0,1 VCC,22,25,0,0,1,1 GND,35,26,0,0,1,1``` | 21:52 |
| sf-slack2 | <kejace> For example, they correspond to the following from (https://github.com/Digilent/vivado-boards/blob/master/new/board_files/arty-a7-35/E.0/part0_pins.xml) ``` <pin index="0" name ="clk" iostandard="LVCMOS33" loc="E3"/> <pin index="41" name ="reset" iostandard="LVCMOS33" loc="C2"/> <pin index="94" name ="usb_uart_rxd" iostandard="LVCMOS33" loc="A9"/> <pin index="95" name ="usb_uart_txd" iostandard="LVCMOS33" loc="D10"/> | 21:54 |
| sf-slack2 | <pin index="30" name ="led_4bits_tri_o_3" iostandard="LVCMOS33" loc="T10"/>``` | 21:54 |
| tpb | Title: vivado-boards/part0_pins.xml at master · Digilent/vivado-boards · GitHub (at github.com) | 21:54 |
| sf-slack2 | <kejace> Let's say I wanted to add `<pin index="31" name ="push_buttons_4bits_tri_i_0" iostandard="LVCMOS33" loc="D9"/>` | 21:54 |
| sf-slack2 | <kejace> What file should I edit? | 21:54 |
| sf-slack2 | <kejace> I guess this relates to `hackerfoo`'s comment above ```Oddly, only the unbonded IO pads are present in the arch.xml. hackerfoo (IRC)APP [8:54 PM] Ah, they are probably being removed since they are in synth_tiles.json.``` | 21:56 |
| hackerfoo | kejace: No, I'm working on something else. Maybe look at this: https://github.com/SymbiFlow/prjxray/blob/master/minitests/roi_harness/README.md | 21:59 |
| tpb | Title: prjxray/README.md at master · SymbiFlow/prjxray · GitHub (at github.com) | 21:59 |
| hackerfoo | I'm working on breaking out of the ROI, but you will need to create a new harness if you want to access more pins. | 22:01 |
| sf-slack2 | <kejace> Ok, thanks, this is helpful | 22:03 |
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| hackerfoo | litghost: Check it out: https://github.com/HackerFoo/hackerfoo-go-functions/commit/e33833793ff4135a2c6ceb8faf2d384f5e9a3825 | 22:44 |
| tpb | Title: find-rr-node: use xmlstarlet to look for rr_graph node information · HackerFoo/hackerfoo-go-functions@e338337 · GitHub (at github.com) | 22:45 |
| hackerfoo | It uses xmlstarlet to dump the nodes and edges in the rr_graph matching an id | 22:45 |
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| duck2 | looks useful. I often wait a minute for so until the editor opens the rr_graph.xml | 23:37 |
| hackerfoo | That query takes about 20 seconds on my machine. | 23:39 |
| litghost | hackerfoo: If you are going to be doing multiple queries, grep is far faster after the initial "xmllint --format" | 23:41 |
| litghost | hackerfoo: E.g. subsecond | 23:41 |
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