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| hackerfoo | None of this explains why 32X1D doesn't work in VPR, right? I think I need to look at the routing. | 00:03 |
|---|---|---|
| litghost | hackerfoo: True, VPR should be able to pack 1 of them (instead of both) | 00:03 |
| litghost | hackerfoo: Check which address lines were being used | 00:03 |
| litghost | hackerfoo: The high bit should be unused | 00:04 |
| litghost | mkurc: I've got top_bram_n2 in Vivado simulating, and I'm starting to debug it. I can see that the fsm_pulse_cnt isn't incrementing, but debugging is going pretty slow | 00:05 |
| litghost | mkurc: If you want a break from the tile split, https://github.com/SymbiFlow/symbiflow-arch-defs/issues/578 would probably accelerate debugging the scalable proc failure | 00:05 |
| tpb | Title: Improve xc7 fasm2verilog output · Issue #578 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 00:05 |
| hackerfoo | Also, di comes in DX & CX, while di2 comes in DI, so no need for BI. | 00:10 |
| hackerfoo | Which wouldn't work because BLUT isn't being used. | 00:11 |
| * hackerfoo posted a file: dram2.jpg (126KB) < http://sandbox.hackerfoo.com:8008/_matrix/media/v1/download/sandbox.hackerfoo.com/uIGDNxuCMjGpRDvzdqyhDOOc > | 00:15 | |
| litghost | I think vpr was packing the second ram into blut which is legal | 00:15 |
| hackerfoo | D6 and C6 aren't connected. | 00:15 |
| hackerfoo | Yes, VPR is using a suboptimal but (I think) correct configuration, so the problem must be elsewhere. | 00:17 |
| hackerfoo | How do I override Conda? I want to add RAM32X1D to cells_sim.v in Yosys. | 01:26 |
| litghost | Set YOSYS env var | 01:33 |
| hackerfoo | Thanks | 01:33 |
| litghost | in general capital binary name as an env var will override conda | 01:33 |
| litghost | I generally use YOSYS VPR and GENFASM | 01:34 |
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| hackerfoo | Overriding the binary doesn't affect the techlibs path, unfortunately. | 03:25 |
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| sf-slack2 | <mkurc> @hackerfoo You can navigate to the Conda env. directory and make change to the techmap there. Its under build/conda I guess | 06:05 |
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| sf-slack2 | <mkurc> @litghost I've updated the VPR to the most recent master+wip (all the time I was using an "old" one). And now everything routes correctly when I shift the grid in X direction. | 07:54 |
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| litghost | Mkurc: ah, very good | 13:10 |
| sf-slack2 | <mkurc> @litghost I've cleaned the code formatting and pushed everything. There is a "fake" CLB split implemented there which converts each CLB to a CLB + EMPTY (NULL) tile. And it works. | 13:15 |
| hackerfoo | mkurc: I'm afraid that if I modify anything managed by Conda it will get overwritten. Of course I could copy it over again, but I don't want to fight the build system. I was able to get what I wanted for now by manually running the simulation. | 13:24 |
| sf-slack2 | <mkurc> @hackerfoo As long as you do not delete the build folder or touch yosys binary in there, techmaps will not be overwritten. | 13:26 |
| sf-slack2 | <mkurc> You can make experiments there provided that you will remember to back them up. | 13:27 |
| litghost | hackerfoo: Ya. FYI yosys has a way to understanding the share folder with the '+/...', but iverilog needs the full path | 15:06 |
| litghost | hackerfoo: We could add logic to handle redirecting the CELLS_SIM variable based on the YOSYS env var | 15:06 |
| litghost | https://github.com/SymbiFlow/symbiflow-arch-defs/blob/master/xc7/make/arch_define.cmake#L20 | 15:06 |
| tpb | Title: symbiflow-arch-defs/arch_define.cmake at master · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 15:06 |
| litghost | hackerfoo: Ah, I thought of this | 15:07 |
| litghost | hackerfoo: https://github.com/SymbiFlow/symbiflow-arch-defs/blob/aee4d6aea05a88bc5cae1d50ff695ff3e86962ad/make/env.cmake#L131 | 15:07 |
| tpb | Title: symbiflow-arch-defs/env.cmake at aee4d6aea05a88bc5cae1d50ff695ff3e86962ad · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 15:07 |
| litghost | hackerfoo: YOSYS_DATADIR is a CMake cache variable, it can be overridden | 15:07 |
| litghost | hackerfoo: Default is to point to conda | 15:07 |
| litghost | mkurc: Great news, I'll try to review the PR today. | 15:08 |
| hackerfoo | litghost: Thanks | 15:09 |
| sf-slack2 | <mkurc> @litghost I am trying to run a `*_autosim_bit` target and the `fasm2bels` complains that it cannot find the `xc7a35tcpg236-1_package_pins.csv` file. Any idea where can I get (or build) this file ? | 15:13 |
| litghost | mkurc: https://github.com/SymbiFlow/symbiflow-arch-defs/pull/581 needs to be merged | 15:13 |
| tpb | Title: Bump third_party/prjxray-db from `e6837b7` to `d31753b` by dependabot · Pull Request #581 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 15:13 |
| litghost | mkurc: Let me do that now | 15:13 |
| litghost | mkurc: Rebase/merge from master, and that should be fixes | 15:14 |
| litghost | fixed* | 15:14 |
| sf-slack2 | <mkurc> @litghost Thanks | 15:14 |
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| sf-slack2 | <acomodi> update on tile_equivalence: I have created a script to move the tile relative tags/attributes to the tiles tag in the XML, it still is WIP as it is specific to the xc7 architectures and it cannot handle generic architectures, I'll open a PR shortly | 15:45 |
| sf-slack2 | <acomodi> moreover, I am currently building picosoc with the equivalence tiles enabled, the process reached the routing stage and is currently at the first iteration. | 15:46 |
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| sf-slack2 | <mkurc> @litghost / @me1 I have the tool for traversing the rr graph. Its written in C++. Shall I create a PR with the code to symbiflow-arch-defs? Where shall I put it in the folder structure ? | 16:04 |
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| mithro | kgugala: Morning? | 16:26 |
| sf-slack2 | <kgugala> Morning | 16:27 |
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| litghost | mkurc: Any reason to not write the tool in python? Symbiflow-arch-defs is mostly written in Python, and I don't see a strong reason to have it in C++. Would you mind converting it, if it is not too much trouble? | 16:40 |
| litghost | mkurc: As for location <root>/utils is a good place for it | 16:41 |
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| mithro | Does anyone know the status of https://github.com/SymbiFlow/prjxray/issues/484 ? | 16:52 |
| tpb | Title: Rename pip to int fuzzers · Issue #484 · SymbiFlow/prjxray · GitHub (at github.com) | 16:52 |
| mithro | Just FYI - VtR just merged -- "Packer: Added support for architectures with more than one chain per cluster (#529)" | 16:55 |
| litghost | mithro: Hasn't been done | 16:55 |
| mithro | For some reason kokoro doesn't seem to want to run on the dependabot pull requests :-/ | 17:00 |
| litghost | mithro: I noticed that too | 17:01 |
| litghost | mithro: Thought I was missing something | 17:01 |
| mithro | litghost: It only automatically runs on people who are team members or collaborators (or when one of those people adds the kokoro-run label) | 17:01 |
| mithro | litghost: But I can't seem to figure out how to convince kokoro that dependabot is a real person due to the fact it is a "GitHub app" | 17:02 |
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| litghost | mithro: What about having dependabot add the kokoro-run label? | 17:02 |
| litghost | mithro: Is that easier? | 17:02 |
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| mithro | litghost: Well, if dependabot added the kokoro-run then I think it would still be ignored because its still an untrusted user? | 18:26 |
| litghost | mithro: Ah :( | 18:26 |
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| sf-slack2 | <acomodi> update on equivalent tiles: Routing of picosoc completed successfully as well as the consistency check | 18:38 |
| sf-slack2 | <kgugala> Awesome | 18:42 |
| litghost | acomodi: Great! | 18:53 |
| mithro | acomodi: Cool! | 18:56 |
| mithro | litghost: Your Yosys change was merged | 20:34 |
| litghost | mithro: Ya, I need to merge yosys in our downstream branch | 20:34 |
| litghost | mithro: I'm trying to debug https://github.com/verilog-to-routing/vtr-verilog-to-routing/issues/526 | 20:34 |
| tpb | Title: Router generating "stub" or "antenna" nets · Issue #526 · verilog-to-routing/vtr-verilog-to-routing · GitHub (at github.com) | 20:34 |
| litghost | kem_ provides a commit that in theory should report stubs, but it doesn't report anything | 20:35 |
| litghost | Which is actually interesting, but did the analysis and showed that there was | 20:35 |
| litghost | because I did the analysis and showed that there was | 20:35 |
| litghost | So either there is a bug in kem_'s check, or something else is going on | 20:36 |
| mithro | litghost: You suggested that maybe something isn't being emitted or loaded correctly? | 20:43 |
| litghost | mithro: Don't know anymore. I think there may be a bug in the FASM edge emission code, still investigating | 20:44 |
| litghost | mithro: Because the FASM definitely has stubs | 20:44 |
| litghost | mithro: But if the VPR routing graph doesn't, then something is misisng | 20:44 |
| mithro | litghost: Yeah | 20:44 |
| litghost | mithro: I haven't proven where the problem is just yet, but if I'm correct that the VPR routing graph has no stubs, but the FASM output does have a stub, then we have a bug that could totally explain https://github.com/SymbiFlow/symbiflow-arch-defs/issues/491 | 20:45 |
| tpb | Title: [XC7] Some designs fail on hardware · Issue #491 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 20:45 |
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| mithro | litghost: I guess that is good? | 21:47 |
| litghost | mithro: That we have a lead? | 21:47 |
| mithro | litghost: Yeah | 21:47 |
| litghost | mithro: Anyways, I think kem_'s code is just wrong | 21:47 |
| litghost | mithro: I'm trying a new algorithm to see if kem_'s stub checking code is broken | 21:48 |
| litghost | mithro: Ya, I think I've proven to myself that kem_'s stub detection was broken, so that avenue of thought is down | 22:15 |
| litghost | mithro: Back to figuring out what is wrong from the fasm2v output :/ | 22:16 |
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