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| sf-slack | <kgugala> good morning | 08:33 |
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| sf-slack | <mgielda> morn' | 08:38 |
| sf-slack | <mkurc> good time of day ;P | 08:42 |
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| sf-slack | <acomodi> Good time of day! I was looking at the prepacker and the way the best_pattern is found. The issue with dram not working with https://github.com/SymbiFlow/vtr-verilog-to-routing/pull/9 should be due to the fact that the round robin policy is used also for non-carrychain patterns. This can lead to the alternate selection of DRAM128 and DRAM128_DP which will produce errors in the cluster_router step. I would suggest to | 11:49 |
| sf-slack | use a mixed strategy with the usage of RR for carrychains and first-fit for the other patterns, what do you think? | 11:49 |
| tpb | Title: [WIP] round robin packing by kgugala · Pull Request #9 · SymbiFlow/vtr-verilog-to-routing · GitHub (at github.com) | 11:49 |
| sf-slack | <kgugala> this should be easy to implement - we can try this and see how it works | 11:50 |
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| sf-slack | <tmichalak> I updated the issue with handling slice_l and slice_r in the same CLB (https://github.com/SymbiFlow/vtr-verilog-to-routing/issues/8) with my latest findings | 20:24 |
| tpb | Title: Placer cannot handle slice_l and slice_r carry chains in the same CLB · Issue #8 · SymbiFlow/vtr-verilog-to-routing · GitHub (at github.com) | 20:24 |
| sf-slack | <tmichalak> I am still not sure what is the exact root cause and how to fix it so any thoughts appreciated | 20:26 |
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