Wednesday, 2018-11-07

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felix_today i finally worked on the hardware test thing again, but spent most of the time wrestling migen. i mean i like a lot about migen/litex, but either vhdl has much better documentation or i'm trying to do things the vhdl way and there's a better solution i just don't see21:20
se6astiancan florrent help maybe with some guidance/tips?21:46
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felix_maybe?21:47
felix_he's also in the channel where i asked about stuff, but haven't gotten any answers yet21:48
KjetilWhat is general status of the hardware now if you don't mind me asking? Has the card been "booted" and clocks programmed?21:54
felix_it should be partially assembled (no sdi chips and probably no si* clocking chip yet) and waiting for a bitstream to test21:58

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