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| shorne | ZipCPU: :) | 21:32 |
|---|---|---|
| ZipCPU | o/ | 21:32 |
| ZipCPU | shorne: What's going on these days? | 21:32 |
| shorne | ZipCPU: still working on GCC for openrisc | 21:44 |
| ZipCPU | I've seen you make great strides at it | 21:44 |
| ZipCPU | I've been impressed | 21:44 |
| ZipCPU | That's taken a lot of work | 21:44 |
| shorne | Adding FPU support and working on some new OpenRISC spec updates | 21:44 |
| ZipCPU | The 1.3 spec has lied dormant for quite some time | 21:44 |
| shorne | also, trying to get all of the verilog cores better tested | 21:44 |
| ZipCPU | I didn't think it was going to see the light of day | 21:45 |
| ZipCPU | Play with the formal methods at all are you ? ;) | 21:45 |
| shorne | Not really playing with them yet, I have been reading some of your stuff, and just verilog `ifdef FORMAL sections of code | 21:46 |
| shorne | but haven't sat down and run anything on my own | 21:46 |
| ZipCPU | If you choose to give them a try, feel free to holler at me if/when you get stuck | 21:47 |
| shorne | I did synthesize some things with yosys | 21:47 |
| ZipCPU | I think you'll be surprised at what you find | 21:47 |
| ZipCPU | Heheh ... yeah, it's one thing to touch your toes to the water, its another to wade in towards the deep end ;) | 21:47 |
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