| *** tpb has joined #litex | 00:00 | |
| *** KSmith has quit IRC | 02:20 | |
| *** Degi has quit IRC | 02:24 | |
| *** Degi has joined #litex | 02:26 | |
| *** nrossi has quit IRC | 04:49 | |
| *** Claude has quit IRC | 04:56 | |
| *** Claude_ has joined #litex | 04:56 | |
| *** shivam has joined #litex | 05:34 | |
| *** _whitelogger has quit IRC | 05:39 | |
| *** CarlFK has joined #litex | 05:40 | |
| *** _whitelogger has joined #litex | 05:41 | |
| *** Claude_ is now known as claude | 06:08 | |
| *** claude is now known as Claude | 06:08 | |
| *** _franck_ has quit IRC | 07:38 | |
| *** _franck_ has joined #litex | 07:50 | |
| *** david-sawatzke[m has left #litex | 09:01 | |
| *** shivam has quit IRC | 11:23 | |
| *** FFY00 has quit IRC | 12:53 | |
| *** FFY00 has joined #litex | 12:53 | |
| *** peeps[zen] has quit IRC | 13:15 | |
| *** peepsalot has joined #litex | 13:15 | |
| *** KSmith has joined #litex | 13:50 | |
| *** Xesxen_ has joined #litex | 14:32 | |
| *** disasm[m] has quit IRC | 14:36 | |
| *** leons has quit IRC | 14:36 | |
| *** disasm[m] has joined #litex | 14:37 | |
| *** leons has joined #litex | 14:37 | |
| *** midnight has quit IRC | 14:38 | |
| *** Xesxen has quit IRC | 14:38 | |
| *** midnight has joined #litex | 14:39 | |
| *** abeljj[m] has quit IRC | 14:41 | |
| *** CarlFK[m] has quit IRC | 14:41 | |
| *** losg has joined #litex | 14:50 | |
| *** abeljj[m] has joined #litex | 14:51 | |
| losg | hello guys | 14:52 |
|---|---|---|
| losg | I'm trying to use litex | 14:52 |
| *** CarlFK[m] has joined #litex | 14:52 | |
| losg | I should have flashed my FPGA, but I cannot see the device with lspcie.. should I remove the JTAG cable? | 14:52 |
| losg | what I dont get is that if the JTAG attached blocks the execution somehow | 14:58 |
| lkcl | daveshah: we found the last long combinatorial path which was in the DIV FSM, libre-soc's now up to 98mhz on an ECP5 | 15:04 |
| lkcl | i say 98mhz: it's still an FSM at the moment so an IPC of around 0.15 | 15:05 |
| *** KSmith has quit IRC | 16:03 | |
| zyp | losg, what board do you have? | 16:32 |
| losg | a Xilinx device | 16:32 |
| losg | Ultrascale kintex | 16:32 |
| losg | the board is not a development board, or very supported one ahah | 16:32 |
| *** losg has quit IRC | 16:56 | |
| *** KSmith has joined #litex | 22:34 | |
| *** alanvgreen has quit IRC | 22:42 | |
| KSmith | hey guys im wondering if i could get some help again, im attempting to install the nexys4ddr prebuilt onto a nexysa7 using linux-on-litex-vexriscv however when i attempt to upload i come across an error https://pastebin.com/TNnzVj1d since im using virtualbox running ubuntu i though virtualbox was the issue but ive had no luck finding a solution, | 23:15 |
| KSmith | within virtualbox i tried setting up the board as a usb device, when that didnt work i tried as a serial device, then both(virtualbox came up with an error when both refer to the same device). as a usb device ubuntu can see the devices https://pastebin.com/fi6ebcnz i tried searching more about the Error: libusb_open() failed with | 23:15 |
| tpb | Title: Pastebin.com - Potentially offensive content ahead! (at pastebin.com) | 23:15 |
| KSmith | LIBUSB_ERROR_ACCESS and found it may have to do with udev rules so i installed that and no change. | 23:15 |
| tpb | Title: Untitled - Pastebin.com (at pastebin.com) | 23:15 |
| somlo | KSmith: I'd try to find some material on how to configure USB forwarding on Virtualbox, seems like that's where your problem might be | 23:42 |
| somlo | _florent_: apparently, on linux, during `litex_mmc_probe()` one must add `mmc->caps |= MMC_CAP_NEEDS_POLL` for eject and reinsert to be recognized by the OS | 23:44 |
| somlo | well, at least in the absence of IRQ capabilities in LiteSDCard :) | 23:44 |
| somlo | after that, I get some horrible-looking errors on re-insertion, but that probably just means there's extra (re)setting that needs to be done on the sdcard (probably via `set_ios()` or thereabouts) | 23:46 |
| somlo | slow (but positive) progress :) | 23:47 |
| *** lf has quit IRC | 23:51 | |
| *** lf has joined #litex | 23:52 | |
Generated by irclog2html.py 2.17.2 by Marius Gedminas - find it at https://mg.pov.lt/irclog2html/!