Saturday, 2020-09-05

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david-sawatzke[mHi, I'm trying to use the colorlight 5a-75b, but when trying to build the target example with `./litex_boards/targets/colorlight_5a_75x.py --build`, it errors out with `4.39. Executing DFFLEGALIZE pass (convert FFs to types supported by the target).17:24
david-sawatzke[mERROR: Conflicting init values for signal 1'0 (\builder_basesoc_wishbone_dat_r [8] = 1'0 != 1'x).`17:24
david-sawatzke[mDoes anyone know what's going wrong?17:24
daveshahIs your Yosys up to date?17:25
david-sawatzke[mShould be, it's the most recent one in nexpkgs: `$ yosys --version17:27
david-sawatzke[mYosys 0.9+2406 (git sha1 000fd08198, g++ 9.3.0 -fPIC -Os)`17:27
david-sawatzke[m * Should be, it's the most recent one in nixpkgs: `$ yosys --version Yosys 0.9+2406 (git sha1 000fd08198, g++ 9.3.0 -fPIC -Os)`17:28
daveshahThat's about two months old17:30
daveshahI think there might have been a fix for the issue after that17:30
daveshahlatest should be 0.9+356517:31
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david-sawatzke[mThanks, ran into some other issues along the way, so can't test if it's fixed by updating18:01
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lkclXICS interrupt handler (equivalent to RISC-V PLIC) in LibreSOC is functional, under litex sim.py20:27
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