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| sb0 | hi | 08:51 |
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| sb0 | _florent_: litepcie is just a thin wrapper around the vendor proprietary IP, and there is currently no open source PCIe core that contains the full stack, correct? | 08:52 |
| _florent_ | sb0: LitePCIe provides a MMAP/DMA core around the integrated PCIe hard block, so it's not handling the lower layers of PCIe and start operating at the TLP layer. | 09:55 |
| _florent_ | so the goals are similar to Xillibus, RIFFA, etc... so it's indeed a thin wrapper in a similar way a USB3 Core is a thin wrapper around a USB3 PIPE, just a matter of connecting wires together :) | 10:08 |
| _florent_ | i'm not aware of an open source PCIe PHY, but there is a current GSoC project on that | 10:09 |
| sorear | (what's the gsoc thing?) | 10:13 |
| sorear | https://github.com/whitequark/Yumewatari is half of one | 10:13 |
| tpb | Title: GitHub - whitequark/Yumewatari: 妖刀夢渡 (at github.com) | 10:13 |
| _florent_ | sorear: sorry i was trying to find it, it's https://github.com/ECP5-PCIe | 10:15 |
| tpb | Title: ECP5-PCIe · GitHub (at github.com) | 10:15 |
| sorear | oh good, the existing work is being used as a base | 10:17 |
| _florent_ | yes, from what i understand, it has been converted from Migen to nMigen and will now go further | 10:18 |
| zyp | hmm, apparently the cle-215 heatsink is glued to the fpga? | 10:28 |
| _florent_ | zyp: i haven't tried personnally but it seems others have been able to remove the heatsink without damaging the FPGA: https://www.eevblog.com/forum/fpga/sqrl-acorn-as-an-interesting-artix-7-board/msg3053338/#msg3053338 | 10:37 |
| tpb | Title: SQRL Acorn as an interesting Artix-7 board? - Page 2 (at www.eevblog.com) | 10:37 |
| zyp | ah, right | 10:38 |
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| keesj | hi | 13:06 |
| _florent_ | keesj: hi | 13:37 |
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| daddesio | ECP5-5G doesn't have PCIe/DDR/USB hard blocks, right? it's just soft cores built atop the SERDES? | 19:42 |
| daveshah | Yes, although DDR doesn't use the SERDES it uses the gearbox | 19:42 |
| daveshah | SERDES in ECP5 is the high speed 5Gbps thingy, not the thing that is on every IO pin | 19:42 |
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