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| somlo | _florent_: how come a "cd_eth" is only explicitly created for arty, netv2, and nexys4ddr? (e.g., https://github.com/enjoy-digital/litex/blob/master/litex/boards/targets/nexys4ddr.py#L36, also https://github.com/enjoy-digital/litex/blob/master/litex/boards/targets/nexys4ddr.py#L47)? | 11:43 |
|---|---|---|
| tpb | Title: litex/nexys4ddr.py at master · enjoy-digital/litex · GitHub (at github.com) | 11:43 |
| somlo | How does it actually still work on other targets where this isn't done? :) | 11:43 |
| _florent_ | somlo: for most of the ethernet PHYs in LiteEth, the clocks are coming directly from the chip and clock domains created in the PHYs. For the RMII PHY, the FPGA generate a 50MHz clock to the chip and this clock is also used in the PHY for TX/RX. | 11:49 |
| somlo | oh, ok, so these three boards all use rmii.py, and every other target uses something else | 11:52 |
| somlo | thanks, that makes sense now :) | 11:52 |
| _florent_ | somlo: yes that's indeed specific to RMII PHYs | 11:57 |
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| awygle | is liteeth a submodule of litex or something? the test suite is failing because i don't have liteeth installed | 19:49 |
| awygle | same for litedram | 19:49 |
| sajattack[m] | if you run litex_setup.py it will fetch all the submodules and install them | 19:53 |
| awygle | i guess more generally, "what is the best way to get set up to develop on litex (not with it)?" | 19:53 |
| sajattack[m] | in the litex repo | 19:53 |
| awygle | but a) i want to work on the source directly and b) i want to install them in a venv, surely? | 19:54 |
| sajattack[m] | I didn't bother with a virtualenv, it will fetch them all as submodules and you can change stuff and re-run setup.py | 19:55 |
| sajattack[m] | that's what I do | 19:55 |
| sajattack[m] | but I'm not an expert | 19:55 |
| awygle | mmk, guess i'll just roll with it. what's the worst that could happen. | 19:56 |
| daveshah | I think litex_setup.py uses "develop" so changes to the repo don't need to be installed | 19:57 |
| awygle | seems like it yeah | 19:58 |
| sajattack[m] | if all else fails clone all the repos | 19:58 |
| awygle | when the litedram test suite says its looking for "any of the cross-compilation toolchains", what does it want specifically? gcc and binutils? | 20:00 |
| daveshah | Yes | 20:02 |
| awygle | mk thanks | 20:03 |
| daveshah | It doesn't need any libraries as it provides its own compiler_rt | 20:03 |
| daveshah | So pretty much any RISC-V gcc, even a Linux one, should suffice | 20:03 |
| awygle | cool | 20:04 |
| awygle | hm, just installing the package from ubuntu does not seem to work unfortunately | 20:09 |
| daveshah | What prefix are those? | 20:11 |
| awygle | riscv64-linux-gnu | 20:11 |
| daveshah | Ah, looks like it only looks for riscv64-linux not riscv64-linux-gnu in the list | 20:11 |
| awygle | the list of toolchains it's looking for includes "riscv64-linux", yeah | 20:12 |
| awygle | to crosstool-ng i spose :p | 20:19 |
| daveshah | You might be able to use https://github.com/enjoy-digital/litex/blob/master/.travis.yml#L12 | 20:23 |
| tpb | Title: litex/.travis.yml at master · enjoy-digital/litex · GitHub (at github.com) | 20:23 |
| sajattack[m] | you can also edit the list of accepted toolchains | 20:33 |
| awygle | arright there we go, pass | 20:35 |
| awygle | now how to run the example.... | 20:35 |
| awygle | Oh, are the litedram examples just examples of dram config that need to be included in larger examples like the litex ones? | 20:44 |
| daveshah | No, litedram can also generate a "standalone" core using those yaml files | 20:46 |
| daveshah | Although the standalone core is effectively a whole LiteX SoC (CPU needed for the init) with a DRAM slave port exposed | 20:47 |
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| awygle | i just want to run a thing that loads onto the versa board, runs some kind of RAM self-test, and then says 'yay' or 'nay' over serial or blinkenlight | 20:48 |
| daveshah | Using a LiteX target rather than litedram would be easier | 20:48 |
| sajattack[m] | the litex bios has memtest built in | 20:48 |
| awygle | do i just cd into litex/boards/targets and python3 versa_ecp5.py? | 20:49 |
| daveshah | Running https://github.com/enjoy-digital/litex/blob/master/litex/boards/targets/versa_ecp5.py will create you a bitstream that prints memory test result to the UART at 115200 | 20:49 |
| daveshah | yes | 20:49 |
| tpb | Title: litex/versa_ecp5.py at master · enjoy-digital/litex · GitHub (at github.com) | 20:49 |
| awygle | cool, thank you | 20:49 |
| sajattack[m] | yeah and then lxterm something or other | 20:49 |
| daveshah | Or any other serial terminal (I think the line end issue is solved now so any terminal works) | 20:50 |
| awygle | litex seems fairly... inseparable? | 20:50 |
| awygle | like it seems difficult to use only small bits of it | 20:50 |
| awygle | is that fair? | 20:51 |
| daveshah | Well if you don't mind having a whole SoC just for DRAM init it is quite possible to use litedram standalone | 20:51 |
| daveshah | liteeth has a less heavyweight standalone mode | 20:52 |
| awygle | i see | 20:54 |
| _florent_ | awygle: the "issue" with a DRAM controller is that you need to do the initialization and as soon as you need to do read/write leveling (for DDR3, DDR4) it's often easier (and even cheaper in resource usage) to have a full SoC than the logic to do that. For now we are using the lite variant of VexRiscv for that, but we could probably reduce resource usage with a slower/smaller CPU. So for this kind of core, the | 21:15 |
| _florent_ | standalone version is indeed a full SoC. | 21:15 |
| somlo | awygle: here's how I set up my entire environment: http://www.contrib.andrew.cmu.edu/~somlo/BTCP/#sec_2_2 | 22:04 |
| tpb | Title: A Trustworthy, Free (Libre), Linux Capable, Self-Hosting 64bit RISC-V Computer (at www.contrib.andrew.cmu.edu) | 22:04 |
| somlo | ignore the git commit IDs and go with the latest (also adjust for non-Fedora distros in terms of installing packages), but that's it for me in a nutshell | 22:05 |
| awygle | thanks! | 22:15 |
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| somlo | being relatively new to Python, I really like how "python3 setup.py develop --user" installs links (in $HOME/local/lib/...) pointing at my git repos, and I can keep hacking on them without needing to reinstall anything | 22:22 |
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