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| gregdavill | pdp7: whoops, that module was a remnant of some hardware DMA tests I was trying, not required for the LCD. | 02:28 |
|---|---|---|
| gregdavill | r4d10n: The BIOS code is compiled and then loaded directly into BRAM during synthesis. So it is embedded in the bitstream and should run once the ECP5 is configured. | 02:30 |
| gregdavill | sajattack[m]: The following files are needed gen.py and uartstream.py. This is all WIP stuff, it could be organised much better. | 02:34 |
| gregdavill | uartstream.py replaces the standard UART module, and provides the serial data (via a FIFO) in the form of a LiteX stream. | 02:36 |
| sajattack[m] | Yeah it locked up my uart | 02:36 |
| gregdavill | gen.py takes a LiteX stream and prints characters to the Terminal display memory. It also handles newlines and line-wrap by scrolling the text up the screen. | 02:37 |
| gregdavill | A solution is to wrap the standard UART module, with a module that splits the TX stream into 2 a main and sub stream. The standard UART terminal will still be connected to main, and the display hooks onto the sub. | 02:45 |
| gregdavill | In its current demo on the hadbadge it's kind of dumb, there is no way to type data into the console. So it's really only useful for showing the Linux startup scroll. | 02:47 |
| sajattack[m] | Ok mine didn't do that either | 03:11 |
| gregdavill | You'll need to add the new uart module to the SoC: https://github.com/gregdavill/linux-on-litex-vexriscv/blob/hadbadge-flash/soc_linux.py#L225 | 03:13 |
| tpb | Title: linux-on-litex-vexriscv/soc_linux.py at hadbadge-flash · gregdavill/linux-on-litex-vexriscv · GitHub (at github.com) | 03:13 |
| gregdavill | Then hook up the fake uart stream, to the terminal generator, and the terminal generator to the terminal: https://github.com/gregdavill/linux-on-litex-vexriscv/blob/hadbadge-flash/soc_linux.py#L238 | 03:14 |
| tpb | Title: linux-on-litex-vexriscv/soc_linux.py at hadbadge-flash · gregdavill/linux-on-litex-vexriscv · GitHub (at github.com) | 03:14 |
| gregdavill | If you can push some code you've got running so far I can take a look for any obvious issues with how things are connected. | 03:15 |
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| sajattack[m] | it's ok I'll look at it another time | 05:05 |
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| sajattack[m] | I think I know why I'm not getting linux booting | 09:45 |
| sajattack[m] | I'm set up for serial boot and your replaced the serial with something that just prints "root\n" at boot | 09:46 |
| sajattack[m] | I haven't dug into litex enough to know what a stream is either | 09:48 |
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| sajattack[m] | OwO what's this? https://github.com/enjoy-digital/litex/blob/017c91a4be6f1463cb771f4bd928db6e7c79a4de/litex/soc/cores/uart.py#L249 | 10:52 |
| tpb | Title: litex/uart.py at 017c91a4be6f1463cb771f4bd928db6e7c79a4de · enjoy-digital/litex · GitHub (at github.com) | 10:52 |
| sajattack[m] | unfortunately uart_stream doesn't seem to have the right interface for that | 11:17 |
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| sajattack[m] | or does it? | 11:26 |
| gregdavill | Ahh, you're still using serialboot. That explains it, that lcd interface, in it's current form, replaces the uart entirely. | 12:11 |
| sajattack[m] | Yeah | 12:12 |
| gregdavill | UARTMultiplexer is probably not the right interface, you'd want something closer to the UARTCrossover. | 12:14 |
| gregdavill | Basically tee off the TX stream, and feed that into gen.py. No need for uart_stream. | 12:15 |
| gregdavill | You only need to connect the data/valid signals, maybe another small FIFO. | 12:16 |
| sajattack[m] | is this enough? https://hastebin.com/alinuquhut.pl | 12:19 |
| * sajattack[m] uploaded an image: image.png (730KB) < https://matrix.org/_matrix/media/r0/download/matrix.org/UrWWrSWrDBgxrekrrOycPgDi > | 12:25 | |
| sajattack[m] | it doesn't work whether I connect to uart or uart.xover | 13:01 |
| gregdavill | You might be able to just do `self.uart.source.connect(gen.sink, omit=['ready'])` | 13:02 |
| sajattack[m] | with or without uartcrossover? | 13:03 |
| gregdavill | without, but I just tested it, and it doesn't work very well. | 13:06 |
| sajattack[m] | not very well is better than not at all | 13:08 |
| gregdavill | https://hastebin.com/ifinohijep.pl | 13:12 |
| gregdavill | This kinda works. You might get some dropped characters on the VGA terminal. | 13:14 |
| gregdavill | For now you can just increase the FIFO size if you see dropped data. :P | 13:16 |
| sajattack[m] | cool thanks | 13:16 |
| sajattack[m] | is 64 the fifo size? | 13:17 |
| gregdavill | Yep | 13:17 |
| gregdavill | What this code is doing, is basically just watching the internal UART TX stream. When a byte is transmitted (ready & valid) it copies it to a FIFO. The terminal generator is then taking these bytes from the FIFO. | 13:18 |
| sajattack[m] | ok | 13:19 |
| sajattack[m] | it's only showing the last line | 13:22 |
| sajattack[m] | and it really doesn't like when I backspace | 13:24 |
| gregdavill | Do you have the latest LiteVideo? | 13:28 |
| sajattack[m] | idk | 13:29 |
| gregdavill | There is a change need for implementing the scrolling. | 13:29 |
| gregdavill | https://github.com/enjoy-digital/litevideo/commit/5974ba830005a9c061b47979df54d923b90d1130 | 13:29 |
| tpb | Title: Merge pull request #27 from gregdavill/terminal-readback · enjoy-digital/litevideo@5974ba8 · GitHub (at github.com) | 13:29 |
| sajattack[m] | probably not | 13:29 |
| sajattack[m] | I've actually been messing with litevideo a bit | 13:30 |
| sajattack[m] | wow, matrix lag | 13:30 |
| gregdavill | I never thought about backspace either... That would need to be added to the gen.py file. | 13:30 |
| gregdavill | The changes to litevideo are small, so you can probably just add them manually. | 13:31 |
| sajattack[m] | it's ok I didn't change much either | 13:32 |
| sajattack[m] | do I need scroll=True in gen.py? | 13:32 |
| sajattack[m] | very cool, now why is it only the top 2/3 of the screen? | 13:40 |
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| sajattack[m] | if I wanted to make a ps/2 keyboard driver, would the best way be to latch on to the uart rx stream? | 23:05 |
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