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| mithro | xobs / somlo: I just came up with a truly horrifying idea... | 21:46 |
|---|---|---|
| mithro | xobs / somlo: I think we should have wishbone and litex-csr busses in Linux | 21:46 |
| mithro | xobs / somlo: Once you have that abstraction, you can attach a wishbone / litex-csr bus via MMIO, PCIe, etc... | 21:47 |
| mithro | xobs / somlo: But it also provides the idea of attaching them via Ethernet or USB!? | 21:47 |
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| somlo | mithro: I like it :) | 23:45 |
| somlo | mithro: in fact, I was *trying* to articulate something similar to @matheusz-holenko here: https://github.com/litex-hub/linux-on-litex-vexriscv/pull/60#issuecomment-572070734 | 23:45 |
| tpb | Title: RFC: update liteeth driver to automatically calculate hwreg offsets by gsomlo · Pull Request #60 · litex-hub/linux-on-litex-vexriscv · GitHub (at github.com) | 23:45 |
| somlo | mithro: that there should be some sort of LiteX SoC bus driver in Linux, and devices hanging off of it should inherit its properties (e.g. csr_data_width), or even better, simply use its exported accessors to read/write their hardware registers, without having to deal with csr_data_width, alignment, etc. | 23:45 |
| somlo | * without having to deal with csr_data_width and alignment *directly* on their own, that is | 23:46 |
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