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| futarisIRCcloud | shenki mentioned that someone tried upstreaming some litex stuff a little while ago. I'll try and coordinate some e-mails etc soon, so we can start upstreaming. I'm planning on working on some of this at the lca 2020 hackfest. Though, I suppose some of you might get this done at 36C3 this weekend. | 05:47 |
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| somlo | futarisIRCcloud: https://lore.kernel.org/patchwork/cover/1143352/ (from mithro, on a discussion at https://github.com/litex-hub/linux-on-litex-vexriscv/pull/60 | 18:08 |
| tpb | Title: [v2,0/4] LiteUART serial driver - Patchwork (at lore.kernel.org) | 18:08 |
| somlo | it was targeted at 32bit vexriscv and 8-bit csr-data-width only. I'm trying to write down everything we know about LiteX CSRs here: https://github.com/enjoy-digital/litex/issues/314 | 18:10 |
| tpb | Title: We need to document LiteX CSRs! · Issue #314 · enjoy-digital/litex · GitHub (at github.com) | 18:10 |
| somlo | and currently have a generic CSR read/write set of methods that should work on all alignments (i.e., cpu word widths) and csr-data-widths (8, 16, 32 bits) here: https://github.com/enjoy-digital/litex/pull/324 | 18:12 |
| tpb | Title: RFC: Updated CSR accessors by gsomlo · Pull Request #324 · enjoy-digital/litex · GitHub (at github.com) | 18:12 |
| somlo | I think Linux upstreaming should start with support for the LiteX CSR SoC wishbone bus, and provide register accessors for other modules (e.g. ethernet, uart, etc.) to read/write LiteX CSR registers | 18:13 |
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