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| scanakci | I am a little bit stuck with compiling BIOS without M extension (i.e. -march=rv64ia -mabi=lp64). Since BlackParrot does not currently support this extension, my plan was to compile BIOS with IA only and circumvent the issue but no luck so far. I am getting bunch of undefined reference to `__clzdi2' and `__ctzdi2' errors originating from ../lib/builtins/udivmoddi4.c file. | 01:13 |
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| scanakci | I think the problem is not related to RISC-V toolchain since I can compile this file separately by including a main function without M extension. I tried the very recent riscv-gcc so the version should not be the problem. Modifying the rocket’s gcc_flags in core.py is enough to reproduce the issue. Currently, I run out of ideas to fix this so I will be grateful for any help :) | 01:13 |
| sorear | did you recompile gcc with the new -march option? | 01:15 |
| scanakci | yes | 01:15 |
| futarisIRCcloud | Looks like ktemkin has got the camlink fpga configuration tool working. | 01:16 |
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| somlo | _florent_: https://github.com/enjoy-digital/rocket-litex-verilog/pull/3 (and also https://github.com/enjoy-digital/litex/pull/320 if you get a chance). That will allow me to post a couple more interesting PRs we can chat about next :) | 18:06 |
| tpb | Title: Add Rocket/Linux variants with double (128bit) and quad (256bit) wide mem_axi ports by gsomlo · Pull Request #3 · enjoy-digital/rocket-litex-verilog · GitHub (at github.com) | 18:06 |
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| _florent_ | somlo: thanks, that's merged | 18:43 |
| somlo | _florent_: thanks! Now, https://github.com/enjoy-digital/litex/pull/321 (exposes wide-mem-axi rocket variants in LiteX proper, and bumps the verilog submodule) :) | 19:08 |
| tpb | Title: cpu/rocket: variants with double (128b) and quad (256b) wide mem_axi by gsomlo · Pull Request #321 · enjoy-digital/litex · GitHub (at github.com) | 19:08 |
| somlo | I'm getting yelled at by various family members, so I'll post the more interesting and maybe-controversial CSR rewrite a bit later :) | 19:08 |
| _florent_ | somlo: just for info, i started looking at the endianness of the CSR subregister but haven't finished yet | 19:13 |
| somlo | _florent_: thanks, let me know whenever you can. In the mean time, we seem to have an (unrelated, I think) 64bit printf problem: https://github.com/enjoy-digital/litex/issues/322 | 21:35 |
| tpb | Title: printf formatting for 64bit integers is broken on 32bit cpus · Issue #322 · enjoy-digital/litex · GitHub (at github.com) | 21:35 |
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